/external/llvm/test/MC/Mips/mips32r6/ |
D | invalid-mips32r2.s | 8 …madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 9 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 11 …msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 12 …nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 15 …nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/ |
D | invalid-mips32r2.s | 8 …madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 9 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 11 …msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 12 …nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe… 15 …nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
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/external/llvm/test/MC/Mips/mips32/ |
D | invalid-mips32r2.s | 15 …luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 17 …madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 18 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 21 …msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 23 …nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 26 …nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 35 …swxc1 $f19,$t4($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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/external/llvm/test/MC/Disassembler/Mips/mips4/ |
D | valid-xfail-mips4.txt | 19 0x46 0x3c 0x9c 0x34 # CHECK: c.olt.d $fcc4, $f19, $f28 31 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20 32 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25 34 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16 35 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19 38 0x4f 0x04 0x98 0x78 # CHECK: nmsub.s $f1, $f24, $f19, $f4 39 0x46 0x20 0x34 0xd5 # CHECK: recip.d $f19, $f6
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/external/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 19 0x46 0x3c 0x9c 0x34 # CHECK: c.olt.d $fcc4, $f19, $f28 37 0x46 0xc5 0x98 0x3c # CHECK: c.lt.ps $f19, $f5 50 0x46 0x13 0x90 0xe6 # CHECK: cvt.ps.s $f3, $f18, $f19 53 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20 55 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25 63 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16 65 0x46 0xc0 0x6c 0xc7 # CHECK: neg.ps $f19, $f13 66 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19 71 0x4f 0x04 0x98 0x78 # CHECK: nmsub.s $f1, $f24, $f19, $f4 76 0x46 0x20 0x34 0xd5 # CHECK: recip.d $f19, $f6
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32/ |
D | invalid-mips32r2.s | 15 …luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 17 …madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 18 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 21 …msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 23 …nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 26 …nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 35 …swxc1 $f19,$t4($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 19 0x46 0x3c 0x9c 0x34 # CHECK: c.olt.d $fcc4, $f19, $f28 37 0x46 0xc5 0x98 0x3c # CHECK: c.lt.ps $f19, $f5 50 0x46 0x13 0x90 0xe6 # CHECK: cvt.ps.s $f3, $f18, $f19 53 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20 55 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25 63 0x4e 0x70 0x53 0x28 # CHECK: msub.s $f12, $f19, $f10, $f16 65 0x46 0xc0 0x6c 0xc7 # CHECK: neg.ps $f19, $f13 66 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19 71 0x4f 0x04 0x98 0x78 # CHECK: nmsub.s $f1, $f24, $f19, $f4
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/external/llvm/test/MC/Mips/mips2/ |
D | invalid-mips32r2.s | 21 …luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 25 …madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 26 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 50 …msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 55 …nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 58 …nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 67 …swxc1 $f19,$t4($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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D | invalid-mips5-wrong-error.s | 15 c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 28 cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 39 neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
D | fpu_asm.h | 27 stfd f19,(stack_size + STACK_FRAME_MIN_SIZE - 96)(%r1); \ 47 lfd f19,(stack_size + STACK_FRAME_MIN_SIZE - 96)(%r1); \ 64 lfd f19,40(r3)
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/external/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 95 luxc1 $f19,$s6($s5) 104 madd.d $f18,$f19,$f26,$f20 105 madd.s $f1,$f31,$f19,$f25 132 msub.s $f12,$f19,$f10,$f16 151 nmadd.d $f18,$f9,$f14,$f19 154 nmsub.s $f1,$f24,$f19,$f4 214 swxc1 $f19,$12($k0)
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/external/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 94 luxc1 $f19,$s6($s5) 103 madd.d $f18,$f19,$f26,$f20 104 madd.s $f1,$f31,$f19,$f25 131 msub.s $f12,$f19,$f10,$f16 150 nmadd.d $f18,$f9,$f14,$f19 153 nmsub.s $f1,$f24,$f19,$f4 213 swxc1 $f19,$12($k0)
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/external/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 94 luxc1 $f19,$s6($s5) 103 madd.d $f18,$f19,$f26,$f20 104 madd.s $f1,$f31,$f19,$f25 131 msub.s $f12,$f19,$f10,$f16 150 nmadd.d $f18,$f9,$f14,$f19 153 nmsub.s $f1,$f24,$f19,$f4 213 swxc1 $f19,$12($k0)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
D | invalid-mips32r2.s | 53 …luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 57 …madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 58 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 82 …msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 87 …nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 90 …nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 99 …swxc1 $f19,$t4($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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D | invalid-mips5-wrong-error.s | 15 c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 28 cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 39 neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/CodeGen/PowerPC/ |
D | vsx-spill.ll | 10 …f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f2… 31 …f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f2… 51 …f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f2…
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
D | set-mips-directives.s | 15 luxc1 $f19,$2($4) 51 # CHECK: luxc1 $f19, $2($4)
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D | set-arch.s | 14 luxc1 $f19, $2($4) 53 # CHECK: luxc1 $f19, $2($4)
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/external/llvm/test/MC/Mips/ |
D | set-mips-directives.s | 15 luxc1 $f19,$2($4) 51 # CHECK: luxc1 $f19, $2($4)
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D | set-arch.s | 14 luxc1 $f19, $2($4) 53 # CHECK: luxc1 $f19, $2($4)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
D | invalid-mips5-wrong-error.s | 15 c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 28 cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 39 neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips1/ |
D | invalid-mips5-wrong-error.s | 15 c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 28 cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 39 neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips3/ |
D | invalid-mips5-wrong-error.s | 15 c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 28 cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 39 neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips4/ |
D | invalid-mips5-wrong-error.s | 15 c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 28 cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 39 neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/ |
D | invalid-mips5-wrong-error.s | 15 c.lt.ps $f19,$f5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 28 cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 39 neg.ps $f19,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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