/external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-xfail-mips64r3.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 49 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 55 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-xfail-mips64r2.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 49 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 55 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-xfail-mips64r5.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 49 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 55 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-xfail-mips64r3.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 49 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 55 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-xfail-mips64r5.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 49 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 55 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-xfail-mips64r2.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 49 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 55 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 53 0x46 0xa0 0xf3 0xe0 # CHECK: cvt.s.l $f15, $f30 54 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 61 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 53 0x46 0xa0 0xf3 0xe0 # CHECK: cvt.s.l $f15, $f30 54 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 61 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 53 0x46 0xa0 0xf3 0xe0 # CHECK: cvt.s.l $f15, $f30 54 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 61 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 53 0x46 0xa0 0xf3 0xe0 # CHECK: cvt.s.l $f15, $f30 54 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 61 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 33 0x4d 0x9e 0x93 0x1e # CHECK: alnv.ps $f12, $f18, $f30, $8 39 0x46 0xde 0xa8 0x3b # CHECK: c.ngl.ps $f21, $f30 41 0x46 0xc6 0xf5 0x3f # CHECK: c.ngt.ps $fcc5, $f30, $f6 51 0x46 0xc0 0x0f 0xa8 # CHECK: cvt.s.pl $f30, $f1 69 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30 72 0x46 0xde 0x4e 0x6c # CHECK: pll.ps $f25, $f9, $f30 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 53 0x46 0xa0 0xf3 0xe0 # CHECK: cvt.s.l $f15, $f30 54 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 61 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 40 0x46 0xc6 0xf6 0x3f # CHECK: c.ngt.ps $fcc6, $f30, $f6 43 0x46 0xce 0xf6 0x3a # CHECK: c.seq.ps $fcc6, $f30, $f14 53 0x46 0xa0 0xf3 0xe0 # CHECK: cvt.s.l $f15, $f30 54 0x46 0xc0 0x17 0xa8 # CHECK: cvt.s.pl $f30, $f2 61 0x46 0xd3 0xf7 0x93 # CHECK: movn.ps $f30, $f30, s3 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 33 0x4d 0x9e 0x93 0x1e # CHECK: alnv.ps $f12, $f18, $f30, $8 39 0x46 0xde 0xa8 0x3b # CHECK: c.ngl.ps $f21, $f30 41 0x46 0xc6 0xf5 0x3f # CHECK: c.ngt.ps $fcc5, $f30, $f6 51 0x46 0xc0 0x0f 0xa8 # CHECK: cvt.s.pl $f30, $f1 69 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30 72 0x46 0xde 0x4e 0x6c # CHECK: pll.ps $f25, $f9, $f30 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/ |
D | valid.s | 47 …c.f.s $fcc4, $f30, $f7 # CHECK: c.f.s $fcc4, $f30, $f7 # encoding: [0x46,0x07,0… 60 …c.ole.d $fcc2, $f16, $f30 # CHECK: c.ole.d $fcc2, $f16, $f30 # encoding: [0x46,0x3e,0… 64 …c.seq.d $fcc4, $f30, $f6 # CHECK: c.seq.d $fcc4, $f30, $f6 # encoding: [0x46,0x26,0… 66 …c.sf.d $f30, $f0 # CHECK: c.sf.d $f30, $f0 # encoding: [0x46,0x20,0… 69 …c.ueq.s $fcc6, $f3, $f30 # CHECK: c.ueq.s $fcc6, $f3, $f30 # encoding: [0x46,0x1e,0… 71 …c.ule.s $fcc7, $f21, $f30 # CHECK: c.ule.s $fcc7, $f21, $f30 # encoding: [0x46,0x1e,0… 75 …c.un.s $fcc1, $f30, $f4 # CHECK: c.un.s $fcc1, $f30, $f4 # encoding: [0x46,0x04,0… 98 … cvt.s.l $f15,$f30 # CHECK: cvt.s.l $f15, $f30 # encoding: [0x46,0xa0,0xf3,0xe0] 207 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0] 227 movt.s $f30,$f2,$fcc1 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
D | valid.s | 47 …c.f.s $fcc4, $f30, $f7 # CHECK: c.f.s $fcc4, $f30, $f7 # encoding: [0x46,0x07,0… 60 …c.ole.d $fcc2, $f16, $f30 # CHECK: c.ole.d $fcc2, $f16, $f30 # encoding: [0x46,0x3e,0… 64 …c.seq.d $fcc4, $f30, $f6 # CHECK: c.seq.d $fcc4, $f30, $f6 # encoding: [0x46,0x26,0… 66 …c.sf.d $f30, $f0 # CHECK: c.sf.d $f30, $f0 # encoding: [0x46,0x20,0… 69 …c.ueq.s $fcc6, $f3, $f30 # CHECK: c.ueq.s $fcc6, $f3, $f30 # encoding: [0x46,0x1e,0… 71 …c.ule.s $fcc7, $f21, $f30 # CHECK: c.ule.s $fcc7, $f21, $f30 # encoding: [0x46,0x1e,0… 75 …c.un.s $fcc1, $f30, $f4 # CHECK: c.un.s $fcc1, $f30, $f4 # encoding: [0x46,0x04,0… 96 … cvt.s.l $f15,$f30 # CHECK: cvt.s.l $f15, $f30 # encoding: [0x46,0xa0,0xf3,0xe0] 195 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0] 214 movt.s $f30,$f2,$fcc1 [all …]
|
D | invalid-mips5-wrong-error.s | 11 alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 17 c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 19 c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 29 cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/ |
D | valid.s | 47 …c.f.s $fcc4, $f30, $f7 # CHECK: c.f.s $fcc4, $f30, $f7 # encoding: [0x46,0x07,0… 60 …c.ole.d $fcc2, $f16, $f30 # CHECK: c.ole.d $fcc2, $f16, $f30 # encoding: [0x46,0x3e,0… 64 …c.seq.d $fcc4, $f30, $f6 # CHECK: c.seq.d $fcc4, $f30, $f6 # encoding: [0x46,0x26,0… 66 …c.sf.d $f30, $f0 # CHECK: c.sf.d $f30, $f0 # encoding: [0x46,0x20,0… 69 …c.ueq.s $fcc6, $f3, $f30 # CHECK: c.ueq.s $fcc6, $f3, $f30 # encoding: [0x46,0x1e,0… 71 …c.ule.s $fcc7, $f21, $f30 # CHECK: c.ule.s $fcc7, $f21, $f30 # encoding: [0x46,0x1e,0… 75 …c.un.s $fcc1, $f30, $f4 # CHECK: c.un.s $fcc1, $f30, $f4 # encoding: [0x46,0x04,0… 96 … cvt.s.l $f15,$f30 # CHECK: cvt.s.l $f15, $f30 # encoding: [0x46,0xa0,0xf3,0xe0] 196 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0] 215 movt.s $f30,$f2,$fcc1 [all …]
|
/external/llvm/test/MC/Mips/ |
D | mips-reginfo-fp32.s | 33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31. 34 abs.d $f30,$f30
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
D | mips-reginfo-fp32.s | 33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31. 34 abs.d $f30,$f30
|
/external/llvm/test/MC/Disassembler/Mips/mips4/ |
D | valid-xfail-mips4.txt | 6 0x46 0x07 0xf4 0x30 # CHECK: c.f.s $fcc4, $f30, $f7 24 0x46 0x1e 0x1e 0x33 # CHECK: c.ueq.s $fcc6, $f3, $f30 26 0x46 0x1e 0xaf 0x37 # CHECK: c.ule.s $fcc7, $f21, $f30 30 0x46 0x04 0xf1 0x31 # CHECK: c.un.s $fcc1, $f30, $f4 37 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30 40 0x46 0x00 0xf0 0xd5 # CHECK: recip.s $f3, $f30
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 50 …c.f.s $fcc4, $f30, $f7 # CHECK: c.f.s $fcc4, $f30, $f7 # encoding: [0x46,0x07,0… 63 …c.ole.d $fcc2, $f16, $f30 # CHECK: c.ole.d $fcc2, $f16, $f30 # encoding: [0x46,0x3e,0… 67 …c.seq.d $fcc4, $f30, $f6 # CHECK: c.seq.d $fcc4, $f30, $f6 # encoding: [0x46,0x26,0… 69 …c.sf.d $f30, $f0 # CHECK: c.sf.d $f30, $f0 # encoding: [0x46,0x20,0… 72 …c.ueq.s $fcc6, $f3, $f30 # CHECK: c.ueq.s $fcc6, $f3, $f30 # encoding: [0x46,0x1e,0… 74 …c.ule.s $fcc7, $f21, $f30 # CHECK: c.ule.s $fcc7, $f21, $f30 # encoding: [0x46,0x1e,0… 78 …c.un.s $fcc1, $f30, $f4 # CHECK: c.un.s $fcc1, $f30, $f4 # encoding: [0x46,0x04,0… 172 movt.s $f30,$f2,$fcc1 190 mul.s $f30,$f10,$f2 204 nmsub.d $f30,$f8,$f16,$f30 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 50 …c.f.s $fcc4, $f30, $f7 # CHECK: c.f.s $fcc4, $f30, $f7 # encoding: [0x46,0x07,0… 63 …c.ole.d $fcc2, $f16, $f30 # CHECK: c.ole.d $fcc2, $f16, $f30 # encoding: [0x46,0x3e,0… 67 …c.seq.d $fcc4, $f30, $f6 # CHECK: c.seq.d $fcc4, $f30, $f6 # encoding: [0x46,0x26,0… 69 …c.sf.d $f30, $f0 # CHECK: c.sf.d $f30, $f0 # encoding: [0x46,0x20,0… 72 …c.ueq.s $fcc6, $f3, $f30 # CHECK: c.ueq.s $fcc6, $f3, $f30 # encoding: [0x46,0x1e,0… 74 …c.ule.s $fcc7, $f21, $f30 # CHECK: c.ule.s $fcc7, $f21, $f30 # encoding: [0x46,0x1e,0… 78 …c.un.s $fcc1, $f30, $f4 # CHECK: c.un.s $fcc1, $f30, $f4 # encoding: [0x46,0x04,0… 171 movt.s $f30,$f2,$fcc1 189 mul.s $f30,$f10,$f2 203 nmsub.d $f30,$f8,$f16,$f30 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 50 …c.f.s $fcc4, $f30, $f7 # CHECK: c.f.s $fcc4, $f30, $f7 # encoding: [0x46,0x07,0… 63 …c.ole.d $fcc2, $f16, $f30 # CHECK: c.ole.d $fcc2, $f16, $f30 # encoding: [0x46,0x3e,0… 67 …c.seq.d $fcc4, $f30, $f6 # CHECK: c.seq.d $fcc4, $f30, $f6 # encoding: [0x46,0x26,0… 69 …c.sf.d $f30, $f0 # CHECK: c.sf.d $f30, $f0 # encoding: [0x46,0x20,0… 72 …c.ueq.s $fcc6, $f3, $f30 # CHECK: c.ueq.s $fcc6, $f3, $f30 # encoding: [0x46,0x1e,0… 74 …c.ule.s $fcc7, $f21, $f30 # CHECK: c.ule.s $fcc7, $f21, $f30 # encoding: [0x46,0x1e,0… 78 …c.un.s $fcc1, $f30, $f4 # CHECK: c.un.s $fcc1, $f30, $f4 # encoding: [0x46,0x04,0… 171 movt.s $f30,$f2,$fcc1 189 mul.s $f30,$f10,$f2 203 nmsub.d $f30,$f8,$f16,$f30 [all …]
|
/external/llvm/test/MC/Mips/mips1/ |
D | invalid-mips5-wrong-error.s | 11 alnv.ps $f12,$f18,$f30,$t0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 17 c.ngl.ps $f21,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 19 c.ngt.ps $fcc5,$f30,$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 29 cvt.s.pl $f30,$f1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|