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/external/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64-xfail.txt13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
44 0x46 0xce 0xfe 0x3a # CHECK: c.seq.ps $fcc6, $f31, $f14
55 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
58 0x46 0xd3 0xff 0xd3 # CHECK: movn.ps $f31, $f31, $19
61 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64-xfail.txt13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
44 0x46 0xce 0xfe 0x3a # CHECK: c.seq.ps $fcc6, $f31, $f14
55 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
58 0x46 0xd3 0xff 0xd3 # CHECK: movn.ps $f31, $f31, $19
61 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
/external/llvm/test/MC/Disassembler/Mips/mips4/
Dvalid-xfail-mips4.txt13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
32 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
33 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
/external/llvm/test/MC/Sparc/
Dsparc-vis.s3 ! CHECK: fzeros %f31 ! encoding: [0xbf,0xb0,0x0c,0x20]
4 fzeros %f31
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Sparc/
Dsparc-vis.s3 ! CHECK: fzeros %f31 ! encoding: [0xbf,0xb0,0x0c,0x20]
4 fzeros %f31
/external/linux-kselftest/tools/testing/selftests/powerpc/include/
Dfpu_asm.h15 stfd f31,(stack_size + STACK_FRAME_MIN_SIZE)(%r1); \
35 lfd f31,(stack_size + STACK_FRAME_MIN_SIZE)(%r1); \
76 lfd f31,136(r3)
/external/llvm/test/MC/Disassembler/Mips/mips32/
Dvalid-xfail-mips32.txt13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32/
Dvalid-xfail-mips32.txt13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
/external/llvm/test/MC/Mips/
Dmips-reginfo-fp32.s33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31.
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmips-reginfo-fp32.s33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31.
/external/llvm/test/CodeGen/PowerPC/
Dvsx-spill.ll10 …19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
31 …19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
51 …0},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31},~{v0},~{v1},~{v2},…
/external/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips32r2.s9 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
10 …msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips32r2.s9 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
10 …msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/
Dinvalid-mips5-wrong-error.s22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips5-wrong-error.s22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/
Dinvalid-mips5-wrong-error.s22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips3/
Dinvalid-mips5-wrong-error.s22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips4/
Dinvalid-mips5-wrong-error.s22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips5-wrong-error.s22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/
Dinvalid-mips5-wrong-error.s22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips5-wrong-error.s25 … c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
36 … movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips5-wrong-error.s25 … c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
36 … movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/CodeGen/Mips/cconv/
Dcallee-saved-float.ll28 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
72 ; O32-INV-NOT: sdc1 $f31,
91 ; N32-INV-NOT: sdc1 $f31,
104 ; N64-DAG: sdc1 [[F31:\$f31]], [[OFF31:[0-9]+]]($sp)
/external/llvm/test/CodeGen/Mips/
Dno-odd-spreg-msa.ll26 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
60 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
90 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
118 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/cconv/
Dcallee-saved-float.ll28 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
72 ; O32-INV-NOT: sdc1 $f31,
91 ; N32-INV-NOT: sdc1 $f31,
104 ; N64-DAG: sdc1 [[F31:\$f31]], [[OFF31:[0-9]+]]($sp)

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