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/external/llvm/test/MC/Mips/
D	mips-fpu-instructions.s	10 # CHECK: abs.s $f6, $f7 # encoding: [0x85,0x39,0x00,0x46] 12 # CHECK: add.s $f9, $f6, $f7 # encoding: [0x40,0x32,0x07,0x46] 14 # CHECK: floor.w.s $f6, $f7 # encoding: [0x8f,0x39,0x00,0x46] 16 # CHECK: ceil.w.s $f6, $f7 # encoding: [0x8e,0x39,0x00,0x46] 18 # CHECK: mul.s $f9, $f6, $f7 # encoding: [0x42,0x32,0x07,0x46] 20 # CHECK: neg.s $f6, $f7 # encoding: [0x87,0x39,0x00,0x46] 22 # CHECK: round.w.s $f6, $f7 # encoding: [0x8c,0x39,0x00,0x46] 24 # CHECK: sqrt.s $f6, $f7 # encoding: [0x84,0x39,0x00,0x46] 26 # CHECK: sub.s $f9, $f6, $f7 # encoding: [0x41,0x32,0x07,0x46] 28 # CHECK: trunc.w.s $f6, $f7 # encoding: [0x8d,0x39,0x00,0x46] [all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
D	mips-fpu-instructions.s	10 # CHECK: abs.s $f6, $f7 # encoding: [0x85,0x39,0x00,0x46] 12 # CHECK: add.s $f9, $f6, $f7 # encoding: [0x40,0x32,0x07,0x46] 14 # CHECK: floor.w.s $f6, $f7 # encoding: [0x8f,0x39,0x00,0x46] 16 # CHECK: ceil.w.s $f6, $f7 # encoding: [0x8e,0x39,0x00,0x46] 18 # CHECK: mul.s $f9, $f6, $f7 # encoding: [0x42,0x32,0x07,0x46] 20 # CHECK: neg.s $f6, $f7 # encoding: [0x87,0x39,0x00,0x46] 22 # CHECK: round.w.s $f6, $f7 # encoding: [0x8c,0x39,0x00,0x46] 24 # CHECK: sqrt.s $f6, $f7 # encoding: [0x84,0x39,0x00,0x46] 26 # CHECK: sub.s $f9, $f6, $f7 # encoding: [0x41,0x32,0x07,0x46] 28 # CHECK: trunc.w.s $f6, $f7 # encoding: [0x8d,0x39,0x00,0x46] [all …]
D	micromips-fpu-instructions.s	96 # CHECK-EL: c.f.s $f6, $f7 # encoding: [0xe6,0x54,0x3c,0x00] 98 # CHECK-EL: c.un.s $f6, $f7 # encoding: [0xe6,0x54,0x7c,0x00] 100 # CHECK-EL: c.eq.s $f6, $f7 # encoding: [0xe6,0x54,0xbc,0x00] 102 # CHECK-EL: c.olt.s $f6, $f7 # encoding: [0xe6,0x54,0x3c,0x01] 104 # CHECK-EL: c.ult.s $f6, $f7 # encoding: [0xe6,0x54,0x7c,0x01] 106 # CHECK-EL: c.ole.s $f6, $f7 # encoding: [0xe6,0x54,0xbc,0x01] 108 # CHECK-EL: c.ule.s $f6, $f7 # encoding: [0xe6,0x54,0xfc,0x01] 110 # CHECK-EL: c.sf.s $f6, $f7 # encoding: [0xe6,0x54,0x3c,0x02] 112 # CHECK-EL: c.ngle.s $f6, $f7 # encoding: [0xe6,0x54,0x7c,0x02] 114 # CHECK-EL: c.seq.s $f6, $f7 # encoding: [0xe6,0x54,0xbc,0x02] [all …]
/external/capstone/suite/MC/Mips/
D	mips-fpu-instructions.s.cs	`3 0x85,0x39,0x00,0x46 = abs.s $f6, $f7 5 0x40,0x32,0x07,0x46 = add.s $f9, $f6, $f7 7 0x8f,0x39,0x00,0x46 = floor.w.s $f6, $f7 9 0x8e,0x39,0x00,0x46 = ceil.w.s $f6, $f7 11 0x42,0x32,0x07,0x46 = mul.s $f9, $f6, $f7 13 0x87,0x39,0x00,0x46 = neg.s $f6, $f7 15 0x8c,0x39,0x00,0x46 = round.w.s $f6, $f7 17 0x84,0x39,0x00,0x46 = sqrt.s $f6, $f7 19 0x41,0x32,0x07,0x46 = sub.s $f9, $f6, $f7 21 0x8d,0x39,0x00,0x46 = trunc.w.s $f6, $f7 [all …]`
/external/mesa3d/src/mesa/sparc/
D	norm.S	`64 fmuls %f0, M8, %f7 ! FGM Group f3 available 70 fmuls %f2, M10, %f4 ! FGM Group f7 available 71 fadds %f7, %f8, %f7 ! FGA Group f8,f3 available 74 fadds %f7, %f4, %f7 ! FGA Group stall f4,f7 available 81 fmuls %f7, %f7, %f10 ! FGM Group f7 available 93 fmuls %f7, %f6, %f7 94 st %f7, [%g3 + 0x08] ! out[i][2] = tz * scale 129 fmuls %f0, M8, %f7 ! FGM Group f3 available 135 fmuls %f2, M10, %f4 ! FGM Group f7 available 136 fadds %f7, %f8, %f7 ! FGA Group f8,f3 available [all …]`
D	xform.S	`308 fmuls %f4, M2, %f7 ! FGM 315 fadds %f7, M14, %f7 ! FGA Group, f7 available 316 st %f7, [%g2 + 0x18] ! LSU 467 fmuls %f1, M5, %f7 ! FGM 474 fadds %f3, %f7, %f3 ! FGA Group f7 available 543 fmuls %f1, M5, %f7 ! FGM Group 555 fadds %f3, %f7, %f3 ! FGA Group f13 available 574 fmuls %f1, M5, %f7 ! FGM Group 579 fadds %f3, %f7, %f3 ! FGA Group f3 available 613 fmuls %f5, M5, %f7 ! FGM Group [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32/
D	valid-mips32-el.txt	`3 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 38 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 40 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
D	valid-mips32.txt	159 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7 163 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7 176 0x46 0x00 0x39 0x84 # CHECK: sqrt.s $f6, $f7 177 0x46 0x00 0x39 0x85 # CHECK: abs.s $f6, $f7 178 0x46 0x00 0x39 0x86 # CHECK: mov.s $f6, $f7 179 0x46 0x00 0x39 0x87 # CHECK: neg.s $f6, $f7 180 0x46 0x00 0x39 0x8c # CHECK: round.w.s $f6, $f7 181 0x46 0x00 0x39 0x8d # CHECK: trunc.w.s $f6, $f7 182 0x46 0x00 0x39 0x8e # CHECK: ceil.w.s $f6, $f7 183 0x46 0x00 0x39 0x8f # CHECK: floor.w.s $f6, $f7 [all …]
/external/llvm/test/MC/Disassembler/Mips/mips32/
D	valid-mips32-el.txt	`3 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 38 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 40 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
D	valid-mips32.txt	159 0x44 0x06 0x38 0x00 # CHECK: mfc1 $6, $f7 163 0x44 0x86 0x38 0x00 # CHECK: mtc1 $6, $f7 176 0x46 0x00 0x39 0x84 # CHECK: sqrt.s $f6, $f7 177 0x46 0x00 0x39 0x85 # CHECK: abs.s $f6, $f7 178 0x46 0x00 0x39 0x86 # CHECK: mov.s $f6, $f7 179 0x46 0x00 0x39 0x87 # CHECK: neg.s $f6, $f7 180 0x46 0x00 0x39 0x8c # CHECK: round.w.s $f6, $f7 181 0x46 0x00 0x39 0x8d # CHECK: trunc.w.s $f6, $f7 182 0x46 0x00 0x39 0x8e # CHECK: ceil.w.s $f6, $f7 183 0x46 0x00 0x39 0x8f # CHECK: floor.w.s $f6, $f7 [all …]
/external/llvm/test/MC/Disassembler/Mips/mips32r2/
D	valid-mips32r2-el.txt	`6 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 9 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 27 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 29 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 31 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 33 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 35 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 37 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 39 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 41 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r5/
D	valid-mips32r5-el.txt	`4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 38 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 40 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/llvm/test/MC/Disassembler/Mips/mips32r3/
D	valid-mips32r3-el.txt	`3 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 24 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 26 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 28 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 30 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 32 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 34 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 36 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 38 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r3/
D	valid-mips32r3-el.txt	`4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 38 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 40 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/llvm/test/MC/Disassembler/Mips/mips32r5/
D	valid-mips32r5-el.txt	`3 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 24 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 26 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 28 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 30 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 32 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 34 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 36 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 38 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/webrtc/webrtc/modules/audio_processing/aec/
D	aec_rdft_mips.c	272 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cft1st_128_mips() local 510 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cft1st_128_mips() 521 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14; in cftmdl_128_mips() local 566 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftmdl_128_mips() 623 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftmdl_128_mips() 711 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftmdl_128_mips() 798 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftmdl_128_mips() 807 float f0, f1, f2, f3, f4, f5, f6, f7, f8; in cftfsub_128_mips() local 856 [f4] "=&f" (f4), [f5] "=&f" (f5), [f6] "=&f" (f6), [f7] "=&f" (f7), in cftfsub_128_mips() 865 float f0, f1, f2, f3, f4, f5, f6, f7, f8; in cftbsub_128_mips() local [all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r2/
D	valid-mips32r2-el.txt	`7 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 10 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 29 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 31 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 33 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 35 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 37 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 39 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 41 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 43 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
D	valid-mips64r5-el.txt	`4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 25 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 27 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 29 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 31 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 33 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 35 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 37 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 39 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/llvm/test/MC/Disassembler/Mips/mips64r3/
D	valid-mips64r3-el.txt	`4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 25 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 27 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 29 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 31 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 33 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 35 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 37 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 39 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r3/
D	valid-mips64r3-el.txt	`4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 38 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 40 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r5/
D	valid-mips64r5-el.txt	`4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 38 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 40 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64/
D	valid-mips64-el.txt	`3 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 24 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 26 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 28 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 30 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 32 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 34 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 36 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 38 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/llvm/test/MC/Disassembler/Mips/mips64/
D	valid-mips64-el.txt	`3 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 24 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 26 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 28 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 30 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 32 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 34 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 36 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 38 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/llvm/test/MC/Disassembler/Mips/mips64r2/
D	valid-mips64r2-el.txt	`7 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 10 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 28 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 30 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 32 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 34 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 36 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 38 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 40 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 42 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r2/
D	valid-mips64r2-el.txt	`7 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7 10 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7 29 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 31 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 33 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 35 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 37 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 39 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 41 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 43 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]`

12 3 4 5 6 7 8 9 10 >>...67

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