Searched refs:fcvtl2 (Results 1 – 25 of 39) sorted by relevance
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/external/llvm/test/CodeGen/AArch64/ |
D | fp16-v8-instructions.ll | 217 ; CHECK: fcvtl2 v1.4s, v0.8h 373 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h 387 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h 400 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h 414 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h
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D | arm64-vcvt_f32_su32.ll | 46 ; CHECK: fcvtl2 v0.4s, v0.8h
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D | arm64-vcvt_f.ll | 16 ; CHECK: fcvtl2 v0.2d, v0.4s
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D | vector-fcopysign.ll | 153 ; CHECK-NEXT: fcvtl2 v4.2d, v2.4s
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/external/capstone/suite/MC/AArch64/ |
D | neon-simd-misc.s.cs | 142 0x8c,0x78,0x21,0x4e = fcvtl2 v12.4s, v4.8h 143 0x91,0x7b,0x61,0x4e = fcvtl2 v17.2d, v28.4s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-vcvt_f32_su32.ll | 46 ; CHECK: fcvtl2 v0.4s, v0.8h
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D | fp16-v8-instructions.ll | 238 ; CHECK: fcvtl2 v1.4s, v0.8h 397 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h 411 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h 424 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h 438 ; CHECK-DAG: fcvtl2 [[HI:v[0-9]+\.4s]], v0.8h
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D | arm64-vcvt_f.ll | 16 ; CHECK: fcvtl2 v0.2d, v0.4s
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D | vector-fcopysign.ll | 153 ; CHECK-NEXT: fcvtl2 v4.2d, v2.4s
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/external/llvm/test/MC/AArch64/ |
D | neon-simd-misc.s | 449 fcvtl2 v12.4s, v4.8h 450 fcvtl2 v17.2d, v28.4s
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D | arm64-advsimd.s | 806 fcvtl2 v3.4s, v7.8h 807 fcvtl2 v4.2d, v8.4s 811 ; CHECK: fcvtl2 v3.4s, v7.8h ; encoding: [0xe3,0x78,0x21,0x4e] 812 ; CHECK: fcvtl2 v4.2d, v8.4s ; encoding: [0x04,0x79,0x61,0x4e]
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D | neon-diagnostics.s | 5834 fcvtl2 v9.4s, v1.4h 5835 fcvtl2 v0.2d, v1.2s
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-simd-misc.s | 449 fcvtl2 v12.4s, v4.8h 450 fcvtl2 v17.2d, v28.4s
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D | arm64-advsimd.s | 806 fcvtl2 v3.4s, v7.8h 807 fcvtl2 v4.2d, v8.4s 811 ; CHECK: fcvtl2 v3.4s, v7.8h ; encoding: [0xe3,0x78,0x21,0x4e] 812 ; CHECK: fcvtl2 v4.2d, v8.4s ; encoding: [0x04,0x79,0x61,0x4e]
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D | neon-diagnostics.s | 5774 fcvtl2 v9.4s, v1.4h 5775 fcvtl2 v0.2d, v1.2s
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.h | 1318 fcvtl2(vd, vn); in Fcvtl2()
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D | simulator-arm64.h | 1977 LogicVRegister fcvtl2(VectorFormat vform, LogicVRegister dst,
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D | assembler-arm64.h | 2503 void fcvtl2(const VRegister& vd, const VRegister& vn);
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 556 # CHECK: fcvtl2 v0.4s, v0.8h 558 # CHECK: fcvtl2 v0.2d, v0.4s
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 556 # CHECK: fcvtl2 v0.4s, v0.8h 558 # CHECK: fcvtl2 v0.2d, v0.4s
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 2939 LogicVRegister fcvtl2(VectorFormat vform,
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D | assembler-aarch64.h | 2311 void fcvtl2(const VRegister& vd, const VRegister& vn);
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 2219 0x~~~~~~~~~~~~~~~~ 4e6178c1 fcvtl2 v1.2d, v6.4s 2220 0x~~~~~~~~~~~~~~~~ 4e217938 fcvtl2 v24.4s, v9.8h
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D | log-disasm | 2219 0x~~~~~~~~~~~~~~~~ 4e6178c1 fcvtl2 v1.2d, v6.4s 2220 0x~~~~~~~~~~~~~~~~ 4e217938 fcvtl2 v24.4s, v9.8h
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 2570 __ fcvtl2(v1.V2D(), v6.V4S()); in GenerateTestSequenceNEONFP() local 2571 __ fcvtl2(v24.V4S(), v9.V8H()); in GenerateTestSequenceNEONFP() local
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