| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 182 fcvtpu h12, h13
183 fcvtpu s12, s13
184 fcvtpu d21, d14
|
| D | arm64-fp-encoding.s | 380 fcvtpu w1, h2
381 fcvtpu w1, s2
382 fcvtpu w1, d2
383 fcvtpu x1, h2
384 fcvtpu x1, s2
385 fcvtpu x1, d2
387 ; FP16: fcvtpu w1, h2 ; encoding: [0x41,0x00,0xe9,0x1e]
389 ; NO-FP16-NEXT: fcvtpu w1, h2
390 ; CHECK: fcvtpu w1, s2 ; encoding: [0x41,0x00,0x29,0x1e]
391 ; CHECK: fcvtpu w1, d2 ; encoding: [0x41,0x00,0x69,0x1e]
[all …]
|
| D | neon-simd-misc.s | 585 fcvtpu v4.4h, v0.4h
586 fcvtpu v6.8h, v8.8h
587 fcvtpu v6.4s, v8.4s
588 fcvtpu v6.2d, v8.2d
589 fcvtpu v4.2s, v0.2s
|
| D | fullfp16-neon-neg.s | 244 fcvtpu h12, h13
342 fcvtpu v4.4h, v0.4h
344 fcvtpu v6.8h, v8.8h
|
| D | arm64-advsimd.s | 888 fcvtpu.2s v0, v0
889 fcvtpu.4s v0, v0
890 fcvtpu.2d v0, v0
891 fcvtpu s0, s0
892 fcvtpu d0, d0 define
894 ; CHECK: fcvtpu.2s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x2e]
895 ; CHECK: fcvtpu.4s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x6e]
896 ; CHECK: fcvtpu.2d v0, v0 ; encoding: [0x00,0xa8,0xe1,0x6e]
897 ; CHECK: fcvtpu s0, s0 ; encoding: [0x00,0xa8,0xa1,0x7e]
898 ; CHECK: fcvtpu d0, d0 ; encoding: [0x00,0xa8,0xe1,0x7e]
|
| D | neon-diagnostics.s | 5846 fcvtpu v0.16b, v31.16b
5847 fcvtpu v2.8h, v4.8h
5848 fcvtpu v1.8b, v9.8b
5849 fcvtpu v13.4h, v21.4h
7051 fcvtpu s0, d0
7052 fcvtpu d0, s0 define
|
| D | basic-a64-instructions.s | 2062 fcvtpu w30, s23
2063 fcvtpu x29, s3
2116 fcvtpu w30, d23
2117 fcvtpu x29, d3
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 182 fcvtpu h12, h13
183 fcvtpu s12, s13
184 fcvtpu d21, d14
|
| D | arm64-fp-encoding.s | 380 fcvtpu w1, h2
381 fcvtpu w1, s2
382 fcvtpu w1, d2
383 fcvtpu x1, h2
384 fcvtpu x1, s2
385 fcvtpu x1, d2
387 ; FP16: fcvtpu w1, h2 ; encoding: [0x41,0x00,0xe9,0x1e]
389 ; NO-FP16-NEXT: fcvtpu w1, h2
390 ; CHECK: fcvtpu w1, s2 ; encoding: [0x41,0x00,0x29,0x1e]
391 ; CHECK: fcvtpu w1, d2 ; encoding: [0x41,0x00,0x69,0x1e]
[all …]
|
| D | neon-simd-misc.s | 585 fcvtpu v4.4h, v0.4h
586 fcvtpu v6.8h, v8.8h
587 fcvtpu v6.4s, v8.4s
588 fcvtpu v6.2d, v8.2d
589 fcvtpu v4.2s, v0.2s
|
| D | fullfp16-neon-neg.s | 244 fcvtpu h12, h13
342 fcvtpu v4.4h, v0.4h
344 fcvtpu v6.8h, v8.8h
|
| D | arm64-advsimd.s | 888 fcvtpu.2s v0, v0
889 fcvtpu.4s v0, v0
890 fcvtpu.2d v0, v0
891 fcvtpu s0, s0
892 fcvtpu d0, d0 define
894 ; CHECK: fcvtpu.2s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x2e]
895 ; CHECK: fcvtpu.4s v0, v0 ; encoding: [0x00,0xa8,0xa1,0x6e]
896 ; CHECK: fcvtpu.2d v0, v0 ; encoding: [0x00,0xa8,0xe1,0x6e]
897 ; CHECK: fcvtpu s0, s0 ; encoding: [0x00,0xa8,0xa1,0x7e]
898 ; CHECK: fcvtpu d0, d0 ; encoding: [0x00,0xa8,0xe1,0x7e]
|
| D | neon-diagnostics.s | 5906 fcvtpu v0.16b, v31.16b
5907 fcvtpu v2.8h, v4.8h
5908 fcvtpu v1.8b, v9.8b
5909 fcvtpu v13.4h, v21.4h
7282 fcvtpu s0, d0
7283 fcvtpu d0, s0 define
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-cvt.ll | 288 ;CHECK: fcvtpu w0, s0
290 %tmp3 = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %A)
296 ;CHECK: fcvtpu x0, s0
298 %tmp3 = call i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float %A)
304 ;CHECK: fcvtpu w0, d0
306 %tmp3 = call i32 @llvm.aarch64.neon.fcvtpu.i32.f64(double %A)
312 ;CHECK: fcvtpu x0, d0
314 %tmp3 = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %A)
318 declare i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float) nounwind readnone
319 declare i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float) nounwind readnone
[all …]
|
| D | round-conv.ll | 124 ; CHECK: fcvtpu w0, s0
134 ; CHECK: fcvtpu x0, s0
144 ; CHECK: fcvtpu w0, d0
154 ; CHECK: fcvtpu x0, d0
|
| D | arm64-vcvt.ll | 161 ;CHECK: fcvtpu.2s v0, v0
163 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtpu.v2i32.v2f32(<2 x float> %A)
170 ;CHECK: fcvtpu.4s v0, v0
172 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtpu.v4i32.v4f32(<4 x float> %A)
179 ;CHECK: fcvtpu.2d v0, v0
181 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtpu.v2i64.v2f64(<2 x double> %A)
185 declare <2 x i32> @llvm.aarch64.neon.fcvtpu.v2i32.v2f32(<2 x float>) nounwind readnone
186 declare <4 x i32> @llvm.aarch64.neon.fcvtpu.v4i32.v4f32(<4 x float>) nounwind readnone
187 declare <2 x i64> @llvm.aarch64.neon.fcvtpu.v2i64.v2f64(<2 x double>) nounwind readnone
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-cvt.ll | 288 ;CHECK: fcvtpu w0, s0
290 %tmp3 = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %A)
296 ;CHECK: fcvtpu x0, s0
298 %tmp3 = call i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float %A)
304 ;CHECK: fcvtpu w0, d0
306 %tmp3 = call i32 @llvm.aarch64.neon.fcvtpu.i32.f64(double %A)
312 ;CHECK: fcvtpu x0, d0
314 %tmp3 = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %A)
318 declare i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float) nounwind readnone
319 declare i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float) nounwind readnone
[all …]
|
| D | fp16_intrinsic_scalar_1op.ll | 3 declare i64 @llvm.aarch64.neon.fcvtpu.i64.f16(half)
4 declare i32 @llvm.aarch64.neon.fcvtpu.i32.f16(half)
276 ; CHECK: fcvtpu w0, h0
279 %fcvt = tail call i32 @llvm.aarch64.neon.fcvtpu.i32.f16(half %a)
286 ; CHECK: fcvtpu x0, h0
289 %vcvtph_u64_f16 = tail call i64 @llvm.aarch64.neon.fcvtpu.i64.f16(half %a)
|
| D | round-conv.ll | 124 ; CHECK: fcvtpu w0, s0
134 ; CHECK: fcvtpu x0, s0
144 ; CHECK: fcvtpu w0, d0
154 ; CHECK: fcvtpu x0, d0
|
| D | arm64-vcvt.ll | 161 ;CHECK: fcvtpu.2s v0, v0
163 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtpu.v2i32.v2f32(<2 x float> %A)
170 ;CHECK: fcvtpu.4s v0, v0
172 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtpu.v4i32.v4f32(<4 x float> %A)
179 ;CHECK: fcvtpu.2d v0, v0
181 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtpu.v2i64.v2f64(<2 x double> %A)
185 declare <2 x i32> @llvm.aarch64.neon.fcvtpu.v2i32.v2f32(<2 x float>) nounwind readnone
186 declare <4 x i32> @llvm.aarch64.neon.fcvtpu.v4i32.v4f32(<4 x float>) nounwind readnone
187 declare <2 x i64> @llvm.aarch64.neon.fcvtpu.v2i64.v2f64(<2 x double>) nounwind readnone
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-cvt.s.cs | 29 0xac,0xa9,0xa1,0x7e = fcvtpu s12, s13
30 0xd5,0xa9,0xe1,0x7e = fcvtpu d21, d14
|
| D | neon-simd-misc.s.cs | 174 0x06,0xa9,0xa1,0x6e = fcvtpu v6.4s, v8.4s
175 0x06,0xa9,0xe1,0x6e = fcvtpu v6.2d, v8.2d
176 0x04,0xa8,0xa1,0x2e = fcvtpu v4.2s, v0.2s
|
| D | basic-a64-instructions.s.cs | 811 0xfe,0x02,0x29,0x1e = fcvtpu w30, s23
812 0x7d,0x00,0x29,0x9e = fcvtpu x29, s3
835 0xfe,0x02,0x69,0x1e = fcvtpu w30, d23
836 0x7d,0x00,0x69,0x9e = fcvtpu x29, d3
|
| /external/vixl/test/aarch64/ |
| D | test-cpu-features-aarch64.cc | 577 TEST_FP(fcvtpu_0, fcvtpu(w0, d1))
578 TEST_FP(fcvtpu_1, fcvtpu(w0, s1))
579 TEST_FP(fcvtpu_2, fcvtpu(x0, d1))
580 TEST_FP(fcvtpu_3, fcvtpu(x0, s1))
3169 TEST_FP_NEON(fcvtpu_0, fcvtpu(v0.V2S(), v1.V2S()))
3170 TEST_FP_NEON(fcvtpu_1, fcvtpu(v0.V4S(), v1.V4S()))
3171 TEST_FP_NEON(fcvtpu_2, fcvtpu(v0.V2D(), v1.V2D()))
3172 TEST_FP_NEON(fcvtpu_3, fcvtpu(s0, s1))
3173 TEST_FP_NEON(fcvtpu_4, fcvtpu(d0, d1))
3406 TEST_FP_FPHALF(fcvtpu_0, fcvtpu(w0, h1))
[all …]
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 411 0x~~~~~~~~~~~~~~~~ 7ee1a838 fcvtpu d24, d1
412 0x~~~~~~~~~~~~~~~~ 7ea1ab0e fcvtpu s14, s24
413 0x~~~~~~~~~~~~~~~~ 1e6903ba fcvtpu w26, d29
414 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26
415 0x~~~~~~~~~~~~~~~~ 9e6900db fcvtpu x27, d6
416 0x~~~~~~~~~~~~~~~~ 9e2901dd fcvtpu x29, s14
2240 0x~~~~~~~~~~~~~~~~ 6ee1aaa3 fcvtpu v3.2d, v21.2d
2241 0x~~~~~~~~~~~~~~~~ 2ea1aaa3 fcvtpu v3.2s, v21.2s
2242 0x~~~~~~~~~~~~~~~~ 6ea1a8e0 fcvtpu v0.4s, v7.4s
|