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Searched refs:fcvtu (Results 1 – 6 of 6) sorted by relevance

/external/vixl/src/aarch64/
Dsimulator-aarch64.cc3952 fcvtu(fpf, rd, rn, FPTieEven); in VisitNEON2RegMisc()
3958 fcvtu(fpf, rd, rn, FPPositiveInfinity); in VisitNEON2RegMisc()
3964 fcvtu(fpf, rd, rn, FPNegativeInfinity); in VisitNEON2RegMisc()
3970 fcvtu(fpf, rd, rn, FPZero); in VisitNEON2RegMisc()
3976 fcvtu(fpf, rd, rn, FPTieAway); in VisitNEON2RegMisc()
4070 fcvtu(fpf, rd, rn, FPTieEven); in VisitNEON2RegMiscFP16()
4076 fcvtu(fpf, rd, rn, FPPositiveInfinity); in VisitNEON2RegMiscFP16()
4082 fcvtu(fpf, rd, rn, FPNegativeInfinity); in VisitNEON2RegMiscFP16()
4088 fcvtu(fpf, rd, rn, FPZero); in VisitNEON2RegMiscFP16()
4094 fcvtu(fpf, rd, rn, FPTieAway); in VisitNEON2RegMiscFP16()
[all …]
Dsimulator-aarch64.h2931 LogicVRegister fcvtu(VectorFormat vform,
Dlogic-aarch64.cc4786 LogicVRegister Simulator::fcvtu(VectorFormat vform, in fcvtu() function in vixl::aarch64::Simulator
/external/v8/src/arm64/
Dsimulator-arm64.cc3618 fcvtu(fpf, rd, rn, FPTieEven); in VisitNEON2RegMisc()
3624 fcvtu(fpf, rd, rn, FPPositiveInfinity); in VisitNEON2RegMisc()
3630 fcvtu(fpf, rd, rn, FPNegativeInfinity); in VisitNEON2RegMisc()
3636 fcvtu(fpf, rd, rn, FPZero); in VisitNEON2RegMisc()
3642 fcvtu(fpf, rd, rn, FPTieAway); in VisitNEON2RegMisc()
4957 fcvtu(fpf, rd, rn, FPTieEven); in VisitNEONScalar2RegMisc()
4963 fcvtu(fpf, rd, rn, FPPositiveInfinity); in VisitNEONScalar2RegMisc()
4969 fcvtu(fpf, rd, rn, FPNegativeInfinity); in VisitNEONScalar2RegMisc()
4975 fcvtu(fpf, rd, rn, FPZero); in VisitNEONScalar2RegMisc()
4981 fcvtu(fpf, rd, rn, FPTieAway); in VisitNEONScalar2RegMisc()
[all …]
Dsimulator-arm64.h1972 LogicVRegister fcvtu(VectorFormat vform, LogicVRegister dst,
Dsimulator-logic-arm64.cc3737 LogicVRegister Simulator::fcvtu(VectorFormat vform, LogicVRegister dst, in fcvtu() function in v8::internal::Simulator