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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/
Dfmin.s10 fmin z0.h, p0/m, z0.h, #0.000000000000000 label
16 fmin z0.h, p0/m, z0.h, #0.0 label
22 fmin z0.s, p0/m, z0.s, #0.0 label
28 fmin z0.d, p0/m, z0.d, #0.0 label
34 fmin z31.h, p7/m, z31.h, #1.000000000000000 label
40 fmin z31.h, p7/m, z31.h, #1.0 label
46 fmin z31.s, p7/m, z31.s, #1.0 label
52 fmin z31.d, p7/m, z31.d, #1.0 label
58 fmin z0.h, p7/m, z0.h, z31.h label
64 fmin z0.s, p7/m, z0.s, z31.s label
[all …]
Dfmin-diagnostics.s6 fmin z0.h, p0/m, z0.h, #0.5 label
11 fmin z0.h, p0/m, z0.h, #-0.0 label
16 fmin z0.h, p0/m, z0.h, #0.0000000000000000000000001 label
21 fmin z0.h, p0/m, z0.h, #1.0000000000000000000000001 label
26 fmin z0.h, p0/m, z0.h, #0.9999999999999999999999999 label
35 fmin z0.h, p7/m, z1.h, z31.h label
44 fmin z0.b, p7/m, z0.b, z31.b label
49 fmin z0.h, p7/m, z0.h, z31.s label
58 fmin z0.h, p8/m, z0.h, z31.h label
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dvector-reduce-fmin-nnan.ll38 %1 = call nnan float @llvm.experimental.vector.reduce.fmin.f32.v2f32(<2 x float> %a0)
77 %1 = call nnan float @llvm.experimental.vector.reduce.fmin.f32.v4f32(<4 x float> %a0)
126 %1 = call nnan float @llvm.experimental.vector.reduce.fmin.f32.v8f32(<8 x float> %a0)
182 %1 = call nnan float @llvm.experimental.vector.reduce.fmin.f32.v16f32(<16 x float> %a0)
209 %1 = call nnan double @llvm.experimental.vector.reduce.fmin.f64.v2f64(<2 x double> %a0)
241 %1 = call nnan double @llvm.experimental.vector.reduce.fmin.f64.v4f64(<4 x double> %a0)
278 %1 = call nnan double @llvm.experimental.vector.reduce.fmin.f64.v8f64(<8 x double> %a0)
322 %1 = call nnan double @llvm.experimental.vector.reduce.fmin.f64.v16f64(<16 x double> %a0)
326 declare float @llvm.experimental.vector.reduce.fmin.f32.v2f32(<2 x float>)
327 declare float @llvm.experimental.vector.reduce.fmin.f32.v4f32(<4 x float>)
[all …]
Dvector-reduce-fmin.ll38 %1 = call float @llvm.experimental.vector.reduce.fmin.f32.v2f32(<2 x float> %a0)
77 %1 = call float @llvm.experimental.vector.reduce.fmin.f32.v4f32(<4 x float> %a0)
126 %1 = call float @llvm.experimental.vector.reduce.fmin.f32.v8f32(<8 x float> %a0)
182 %1 = call float @llvm.experimental.vector.reduce.fmin.f32.v16f32(<16 x float> %a0)
209 %1 = call double @llvm.experimental.vector.reduce.fmin.f64.v2f64(<2 x double> %a0)
241 %1 = call double @llvm.experimental.vector.reduce.fmin.f64.v4f64(<4 x double> %a0)
278 %1 = call double @llvm.experimental.vector.reduce.fmin.f64.v8f64(<8 x double> %a0)
322 %1 = call double @llvm.experimental.vector.reduce.fmin.f64.v16f64(<16 x double> %a0)
326 declare float @llvm.experimental.vector.reduce.fmin.f32.v2f32(<2 x float>)
327 declare float @llvm.experimental.vector.reduce.fmin.f32.v4f32(<4 x float>)
[all …]
/external/llvm/test/MC/AArch64/
Dneon-max-min.s85 fmin v10.4h, v15.4h, v22.4h
86 fmin v10.8h, v15.8h, v22.8h
87 fmin v10.2s, v15.2s, v22.2s
88 fmin v3.4s, v5.4s, v6.4s
89 fmin v17.2d, v13.2d, v2.2d
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-max-min.s85 fmin v10.4h, v15.4h, v22.4h
86 fmin v10.8h, v15.8h, v22.8h
87 fmin v10.2s, v15.2s, v22.2s
88 fmin v3.4s, v5.4s, v6.4s
89 fmin v17.2d, v13.2d, v2.2d
/external/autotest/client/site_tests/kernel_CpufreqMinMax/
Dkernel_CpufreqMinMax.py66 fmin = open(self.sys_cpufreq_path + 'cpuinfo_min_freq', 'r')
68 available_freqs = map(int, [fmin.read(), fmax.read()])
69 fmin.close()
/external/apache-commons-math/src/main/java/org/apache/commons/math/analysis/solvers/
DBisectionSolver.java107 double fmin; in solve() local
112 fmin = f.value(min); in solve()
115 if (fm * fmin > 0.0) { in solve()
/external/llvm/test/CodeGen/PowerPC/
Dfminnum.ll4 declare double @fmin(double, double)
22 ; CHECK: bl fmin
24 %z = call double @fmin(double %x, double %y) readnone
43 ; CHECK: bl fmin
Dctr-minmaxnum.ll8 declare double @fmin(double, double)
170 ; CHECK: bl fmin
178 %0 = call double @fmin(double %f, double 1.0) readnone
190 ; CHECK: bl fmin
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dfminnum.ll4 declare double @fmin(double, double)
22 ; CHECK: bl fmin
24 %z = call double @fmin(double %x, double %y) readnone
43 ; CHECK: bl fmin
Dctr-minmaxnum.ll7 declare double @fmin(double, double)
195 ; CHECK: bl fmin
196 ; CHECK-NOT: bl fmin
206 %0 = call double @fmin(double %f, double 1.0) readnone
218 ; CHECK: bl fmin
219 ; CHECK-NOT: bl fmin
/external/jdiff/src/jdiff/
DDiffMyers.java119 int fmin = fmid, fmax = fmid; // Limits of top-down search. in diag() local
134 if (fmin > dmin) in diag()
135 fd[fdiagoff + --fmin - 1] = -1; in diag()
137 ++fmin; in diag()
142 for (d = fmax; d >= fmin; d -= 2) in diag()
190 if (!odd && fmin <= d && d <= fmax && bd[bdiagoff + d] <= fd[fdiagoff + d]) in diag()
210 for (d = fmax; d >= fmin; d -= 2) in diag()
/external/capstone/suite/MC/AArch64/
Dneon-max-min.s.cs29 0xea,0xf5,0xb6,0x0e = fmin v10.2s, v15.2s, v22.2s
30 0xa3,0xf4,0xa6,0x4e = fmin v3.4s, v5.4s, v6.4s
31 0xb1,0xf5,0xe2,0x4e = fmin v17.2d, v13.2d, v2.2d
/external/llvm/test/CodeGen/AArch64/
Darm64-fmax.ll20 ; CHECK: fmin
32 ; CHECK: fmin
61 ; FIXME: It'd be nice for this to create an fmin instruction!
Darm64-fmax-safe.ll20 ; CHECK: fmin s
24 ; must become fminnm, not fmin.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-fmax.ll20 ; CHECK: fmin
32 ; CHECK: fmin
61 ; FIXME: It'd be nice for this to create an fmin instruction!
Darm64-fmax-safe.ll20 ; CHECK: fmin s
24 ; must become fminnm, not fmin.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dlds_atomic_f32.ll5 declare float @llvm.amdgcn.ds.fmin(float addrspace(3)* nocapture, float, i32, i32, i1)
43 …%a1 = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %ptr0, float 4.2e+1, i32 0, i32 0, i1 fa…
44 …%a2 = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %ptr1, float 4.2e+1, i32 0, i32 0, i1 fa…
45 …%a3 = call float @llvm.amdgcn.ds.fmin(float addrspace(3)* %ptrf, float %a1, i32 0, i32 0, i1 false)
/external/llvm/test/CodeGen/Mips/msa/
D3rf.ll166 %2 = tail call <4 x float> @llvm.mips.fmin.w(<4 x float> %0, <4 x float> %1)
171 declare <4 x float> @llvm.mips.fmin.w(<4 x float>, <4 x float>) nounwind
176 ; CHECK: fmin.w
188 %2 = tail call <2 x double> @llvm.mips.fmin.d(<2 x double> %0, <2 x double> %1)
193 declare <2 x double> @llvm.mips.fmin.d(<2 x double>, <2 x double>) nounwind
198 ; CHECK: fmin.d
210 %2 = tail call <4 x float> @llvm.mips.fmin.a.w(<4 x float> %0, <4 x float> %1)
215 declare <4 x float> @llvm.mips.fmin.a.w(<4 x float>, <4 x float>) nounwind
232 %2 = tail call <2 x double> @llvm.mips.fmin.a.d(<2 x double> %0, <2 x double> %1)
237 declare <2 x double> @llvm.mips.fmin.a.d(<2 x double>, <2 x double>) nounwind
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/
D3rf.ll166 %2 = tail call <4 x float> @llvm.mips.fmin.w(<4 x float> %0, <4 x float> %1)
171 declare <4 x float> @llvm.mips.fmin.w(<4 x float>, <4 x float>) nounwind
176 ; CHECK: fmin.w
188 %2 = tail call <2 x double> @llvm.mips.fmin.d(<2 x double> %0, <2 x double> %1)
193 declare <2 x double> @llvm.mips.fmin.d(<2 x double>, <2 x double>) nounwind
198 ; CHECK: fmin.d
210 %2 = tail call <4 x float> @llvm.mips.fmin.a.w(<4 x float> %0, <4 x float> %1)
215 declare <4 x float> @llvm.mips.fmin.a.w(<4 x float>, <4 x float>) nounwind
232 %2 = tail call <2 x double> @llvm.mips.fmin.a.d(<2 x double> %0, <2 x double> %1)
237 declare <2 x double> @llvm.mips.fmin.a.d(<2 x double>, <2 x double>) nounwind
/external/clang/lib/Headers/
D__clang_cuda_math_forward_declares.h89 __DEVICE__ double fmin(double, double);
90 __DEVICE__ float fmin(float, float);
210 using ::fmin;
/external/llvm/test/Transforms/InstCombine/
Dfloat-shrink-compare.ll176 %3 = call double @fmin(double %1, double %2) nounwind
190 %4 = call double @fmin(double %2, double %3) nounwind
241 %3 = call double @fmin(double 1.000000e+00, double %2) nounwind
253 %3 = call double @fmin(double 1.300000e+00, double %2) nounwind
259 ; CHECK: %3 = call double @fmin(double 1.300000e+00, double %2)
270 declare double @fmin(double, double) nounwind readnone
/external/tensorflow/tensorflow/compiler/tf2xla/kernels/
Dquantize_and_dequantize_op.cc69 const xla::XlaComputation* fmin = ctx->GetOrCreateMin(data_type); in Compile() local
70 min_range = ReduceAll(input, xla::MaxValue(b, xla_type), *fmin); in Compile()
/external/llvm/test/MC/Mips/msa/
Dtest_3rf.s39 # CHECK: fmin.w $w24, $w1, $w30 # encoding: [0x7b,0x1e,0x0e,0x1b]
40 # CHECK: fmin.d $w27, $w27, $w10 # encoding: [0x7b,0x2a,0xde,0xdb]
122 fmin.w $w24, $w1, $w30
123 fmin.d $w27, $w27, $w10

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