/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | fp-dp3.ll | 32 ; CHECK: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 33 ; CHECK-NOFAST: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 72 ; CHECK: fnmadd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 73 ; CHECK-NOFAST: fnmadd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 117 ; CHECK: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 118 ; CHECK-NOFAST-NOT: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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D | arm64-fmadd.ll | 14 ; CHECK: fnmadd s0, s0, s1, s2 57 ; CHECK: fnmadd d0, d0, d1, d2
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D | arm64-fml-combines.ll | 133 ; CHECK: fnmadd s0, s0, s1, s2 143 ; CHECK: fnmadd d0, d0, d1, d2
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/external/llvm/test/CodeGen/AArch64/ |
D | fp-dp3.ll | 32 ; CHECK: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 33 ; CHECK-NOFAST: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 72 ; CHECK: fnmadd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 73 ; CHECK-NOFAST: fnmadd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 117 ; CHECK: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}} 118 ; CHECK-NOFAST-NOT: fnmadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
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D | arm64-fmadd.ll | 14 ; CHECK: fnmadd s0, s0, s1, s2 57 ; CHECK: fnmadd d0, d0, d1, d2
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/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding-fp.s.cs | 67 0xfc,0x43,0x29,0x3e = fnmadd 2, 3, 4, 5 68 0xfc,0x43,0x29,0x3f = fnmadd. 2, 3, 4, 5
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-fp.s | 218 # CHECK-BE: fnmadd 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3e] 219 # CHECK-LE: fnmadd 2, 3, 4, 5 # encoding: [0x3e,0x29,0x43,0xfc] 220 fnmadd 2, 3, 4, 5 221 # CHECK-BE: fnmadd. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3f] 222 # CHECK-LE: fnmadd. 2, 3, 4, 5 # encoding: [0x3f,0x29,0x43,0xfc] 223 fnmadd. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-fp.s | 224 # CHECK-BE: fnmadd 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3e] 225 # CHECK-LE: fnmadd 2, 3, 4, 5 # encoding: [0x3e,0x29,0x43,0xfc] 226 fnmadd 2, 3, 4, 5 227 # CHECK-BE: fnmadd. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3f] 228 # CHECK-LE: fnmadd. 2, 3, 4, 5 # encoding: [0x3f,0x29,0x43,0xfc] 229 fnmadd. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/ |
D | rv32d-valid.s | 58 # CHECK-INST: fnmadd.d fs6, fs7, fs8, fs9, dyn 60 fnmadd.d f22, f23, f24, f25, dyn 133 # CHECK-INST: fnmadd.d fs6, fs7, fs8, fs9, rup 135 fnmadd.d f22, f23, f24, f25, rup
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D | rvd-aliases-valid.s | 59 # CHECK-INST: fnmadd.d fs6, fs7, fs8, fs9, dyn 60 # CHECK-ALIAS: fnmadd.d fs6, fs7, fs8, fs9{{[[:space:]]}} 61 fnmadd.d f22, f23, f24, f25
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D | rv32f-valid.s | 53 # CHECK-INST: fnmadd.s fs6, fs7, fs8, fs9, dyn 55 fnmadd.s f22, f23, f24, f25, dyn 129 # CHECK-INST: fnmadd.s fs6, fs7, fs8, fs9, rup 131 fnmadd.s f22, f23, f24, f25, rup
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D | rvf-aliases-valid.s | 110 # CHECK-INST: fnmadd.s fs6, fs7, fs8, fs9, dyn 111 # CHECK-ALIAS: fnmadd.s fs6, fs7, fs8, fs9{{[[:space:]]}} 112 fnmadd.s f22, f23, f24, f25
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/external/llvm/test/CodeGen/PowerPC/ |
D | fma-ext.ll | 68 ; CHECK: fnmadd 85 ; CHECK: fnmadd
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D | fma.ll | 71 ; CHECK: fnmadd 85 ; CHECK: fnmadd
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | fma-ext.ll | 68 ; CHECK: fnmadd 85 ; CHECK: fnmadd
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D | fma.ll | 71 ; CHECK: fnmadd 85 ; CHECK: fnmadd
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/external/llvm/test/MC/AArch64/ |
D | arm64-fp-encoding.s | 116 fnmadd h1, h2, h3, h4 117 fnmadd s1, s2, s3, s4 118 fnmadd d1, d2, d3, d4 define 120 ; FP16: fnmadd h1, h2, h3, h4 ; encoding: [0x41,0x10,0xe3,0x1f] 122 ; NO-FP16-NEXT: fnmadd h1, h2, h3, h4 123 ; CHECK: fnmadd s1, s2, s3, s4 ; encoding: [0x41,0x10,0x23,0x1f] 124 ; CHECK: fnmadd d1, d2, d3, d4 ; encoding: [0x41,0x10,0x63,0x1f]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-fp-encoding.s | 116 fnmadd h1, h2, h3, h4 117 fnmadd s1, s2, s3, s4 118 fnmadd d1, d2, d3, d4 define 120 ; FP16: fnmadd h1, h2, h3, h4 ; encoding: [0x41,0x10,0xe3,0x1f] 122 ; NO-FP16-NEXT: fnmadd h1, h2, h3, h4 123 ; CHECK: fnmadd s1, s2, s3, s4 ; encoding: [0x41,0x10,0x23,0x1f] 124 ; CHECK: fnmadd d1, d2, d3, d4 ; encoding: [0x41,0x10,0x63,0x1f]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-scalar-fp.txt | 96 # FP16: fnmadd h1, h2, h3, h4 97 # CHECK: fnmadd s1, s2, s3, s4 98 # CHECK: fnmadd d1, d2, d3, d4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-scalar-fp.txt | 96 # FP16: fnmadd h1, h2, h3, h4 97 # CHECK: fnmadd s1, s2, s3, s4 98 # CHECK: fnmadd d1, d2, d3, d4
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-fp.txt | 198 # CHECK: fnmadd 2, 3, 4, 5 201 # CHECK: fnmadd. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-fp.txt | 198 # CHECK: fnmadd 2, 3, 4, 5 201 # CHECK: fnmadd. 2, 3, 4, 5
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfoD.td | 88 def FNMADD_D : FPFMAD_rrr_frm<OPC_NMADD, "fnmadd.d">; 89 def : FPFMADDynFrmAlias<FNMADD_D, "fnmadd.d">;
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D | RISCVInstrInfoF.td | 109 def FNMADD_S : FPFMAS_rrr_frm<OPC_NMADD, "fnmadd.s">; 110 def : FPFMASDynFrmAlias<FNMADD_S, "fnmadd.s">;
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/external/vixl/doc/ |
D | changelog.md | 98 + Added support for `fmadd`, `fnmadd`, `fnmsub`, `fminnm`, `fmaxnm`,
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