/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | recp-fastmath.ll | 20 ; CHECK-NEXT: frecps {{s[0-7](, s[0-7])?}}, [[R]] 21 ; CHECK: frecps {{s[0-7]}}, {{s[0-7]}}, {{s[0-7]}} 22 ; CHECK-NOT: frecps {{s[0-7]}}, {{s[0-7]}}, {{s[0-7]}} 42 ; CHECK-NEXT: frecps {{v[0-7]\.2s(, v[0-7].2s)?}}, [[R]] 43 ; CHECK: frecps {{v[0-7]\.2s}}, {{v[0-7]\.2s}}, {{v[0-7]\.2s}} 44 ; CHECK-NOT: frecps {{v[0-7]\.2s}}, {{v[0-7]\.2s}}, {{v[0-7]\.2s}} 64 ; CHECK-NEXT: frecps {{v[0-7]\.4s(, v[0-7].4s)?}}, [[R]] 65 ; CHECK: frecps {{v[0-7]\.4s}}, {{v[0-7]\.4s}}, {{v[0-7]\.4s}} 66 ; CHECK-NOT: frecps {{v[0-7]\.4s}}, {{v[0-7]\.4s}}, {{v[0-7]\.4s}} 87 ; CHECK: frecps {{v[0-7]\.4s(, v[0-7].4s)?}}, [[R]] [all …]
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D | arm64-vsqrt.ll | 5 ;CHECK: frecps.2s 8 %tmp3 = call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) 14 ;CHECK: frecps.4s 17 %tmp3 = call <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2) 23 ;CHECK: frecps.2d 26 %tmp3 = call <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double> %tmp1, <2 x double> %tmp2) 30 declare <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float>, <2 x float>) nounwind readnone 31 declare <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float>, <4 x float>) nounwind readnone 32 declare <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double>, <2 x double>) nounwind readnone
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D | fp16_intrinsic_scalar_2op.ll | 7 declare half @llvm.aarch64.neon.frecps.f16(half, half) 114 ; CHECK: frecps h0, h0, h1 117 %vrecps = tail call half @llvm.aarch64.neon.frecps.f16(half %a, half %b)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-frsqrt-frecp.s | 23 frecps v3.4h, v8.4h, v12.4h 24 frecps v31.8h, v29.8h, v28.8h 25 frecps v31.4s, v29.4s, v28.4s 26 frecps v3.2s, v8.2s, v12.2s 27 frecps v17.2d, v15.2d, v13.2d
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D | neon-scalar-recip.s | 9 frecps h21, h16, h13 10 frecps s21, s16, s13 11 frecps d22, d30, d21
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D | fullfp16-neon-neg.s | 172 frecps v3.4h, v8.4h, v12.4h 174 frecps v31.8h, v29.8h, v28.8h 282 frecps h21, h16, h13
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D | arm64-advsimd.s | 331 frecps.2s v0, v0, v0 402 ; CHECK: frecps.2s v0, v0, v0 ; encoding: [0x00,0xfc,0x20,0x0e] 464 frecps.4h v0, v0, v0 489 ; CHECK: frecps.4h v0, v0, v0 ; encoding: [0x00,0x3c,0x40,0x0e] 514 frecps.8h v0, v0, v0 539 ; CHECK: frecps.8h v0, v0, v0 ; encoding: [0x00,0x3c,0x40,0x4e]
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D | neon-diagnostics.s | 387 frecps v0.4s, v1.2d, v2.4s 388 frecps v0.8h, v1.8h, v2.8h 3829 frecps s21, s16, h13 3830 frecps d22, s30, d21
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/external/llvm/test/MC/AArch64/ |
D | neon-frsqrt-frecp.s | 23 frecps v3.4h, v8.4h, v12.4h 24 frecps v31.8h, v29.8h, v28.8h 25 frecps v31.4s, v29.4s, v28.4s 26 frecps v3.2s, v8.2s, v12.2s 27 frecps v17.2d, v15.2d, v13.2d
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D | neon-scalar-recip.s | 9 frecps h21, h16, h13 10 frecps s21, s16, s13 11 frecps d22, d30, d21
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D | fullfp16-neon-neg.s | 172 frecps v3.4h, v8.4h, v12.4h 174 frecps v31.8h, v29.8h, v28.8h 282 frecps h21, h16, h13
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D | arm64-advsimd.s | 331 frecps.2s v0, v0, v0 402 ; CHECK: frecps.2s v0, v0, v0 ; encoding: [0x00,0xfc,0x20,0x0e] 464 frecps.4h v0, v0, v0 489 ; CHECK: frecps.4h v0, v0, v0 ; encoding: [0x00,0x3c,0x40,0x0e] 514 frecps.8h v0, v0, v0 539 ; CHECK: frecps.8h v0, v0, v0 ; encoding: [0x00,0x3c,0x40,0x4e]
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D | neon-diagnostics.s | 382 frecps v0.4s, v1.2d, v2.4s 383 frecps v0.8h, v1.8h, v2.8h 3889 frecps s21, s16, h13 3890 frecps d22, s30, d21
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
D | frecps-diagnostics.s | 7 frecps z0.b, z1.b, z2.b label 12 frecps z0.h, z1.s, z2.s label 22 frecps z0.d, z1.d, z31.d label 28 frecps z0.d, z1.d, z31.d label
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D | frecps.s | 10 frecps z0.h, z1.h, z31.h label 16 frecps z0.s, z1.s, z31.s label 22 frecps z0.d, z1.d, z31.d label
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/external/capstone/suite/MC/AArch64/ |
D | neon-frsqrt-frecp.s.cs | 5 0xbf,0xff,0x3c,0x4e = frecps v31.4s, v29.4s, v28.4s 6 0x03,0xfd,0x2c,0x0e = frecps v3.2s, v8.2s, v12.2s 7 0xf1,0xfd,0x6d,0x4e = frecps v17.2d, v15.2d, v13.2d
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D | neon-scalar-recip.s.cs | 2 0x15,0xfe,0x2d,0x5e = frecps s21, s16, s13 3 0xd6,0xff,0x75,0x5e = frecps d22, d30, d21
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vsqrt.ll | 5 ;CHECK: frecps.2s 8 %tmp3 = call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) 14 ;CHECK: frecps.4s 17 %tmp3 = call <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2) 23 ;CHECK: frecps.2d 26 %tmp3 = call <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double> %tmp1, <2 x double> %tmp2) 30 declare <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float>, <2 x float>) nounwind readnone 31 declare <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float>, <4 x float>) nounwind readnone 32 declare <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double>, <2 x double>) nounwind readnone
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/external/vixl/src/aarch64/ |
D | logic-aarch64.cc | 4198 LogicVRegister Simulator::frecps(VectorFormat vform, in frecps() function in vixl::aarch64::Simulator 4213 LogicVRegister Simulator::frecps(VectorFormat vform, in frecps() function in vixl::aarch64::Simulator 4218 frecps<SimFloat16>(vform, dst, src1, src2); in frecps() 4220 frecps<float>(vform, dst, src1, src2); in frecps() 4223 frecps<double>(vform, dst, src1, src2); in frecps()
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D | simulator-aarch64.cc | 4242 frecps(vf, rd, rn, rm); in VisitNEON3Same() 4430 SIM_FUNC(FRECPS, frecps); in VisitNEON3SameFP16() 5766 frecps(vf, rd, rn, rm); in VisitNEONScalar3Same() 5879 frecps(kFormatH, rd, rn, rm); in VisitNEONScalar3SameFP16()
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D | simulator-aarch64.h | 2835 LogicVRegister frecps(VectorFormat vform, 2839 LogicVRegister frecps(VectorFormat vform,
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/external/v8/src/arm64/ |
D | simulator-logic-arm64.cc | 3305 LogicVRegister Simulator::frecps(VectorFormat vform, LogicVRegister dst, in frecps() function in v8::internal::Simulator 3318 LogicVRegister Simulator::frecps(VectorFormat vform, LogicVRegister dst, in frecps() function in v8::internal::Simulator 3322 frecps<float>(vform, dst, src1, src2); in frecps() 3325 frecps<double>(vform, dst, src1, src2); in frecps()
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D | simulator-arm64.h | 1912 LogicVRegister frecps(VectorFormat vform, LogicVRegister dst, 1914 LogicVRegister frecps(VectorFormat vform, LogicVRegister dst,
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/external/vixl/test/aarch64/ |
D | test-cpu-features-aarch64.cc | 3279 TEST_FP_NEON(frecps_0, frecps(v0.V2S(), v1.V2S(), v2.V2S())) 3280 TEST_FP_NEON(frecps_1, frecps(v0.V4S(), v1.V4S(), v2.V4S())) 3281 TEST_FP_NEON(frecps_2, frecps(v0.V2D(), v1.V2D(), v2.V2D())) 3282 TEST_FP_NEON(frecps_3, frecps(s0, s1, s2)) 3283 TEST_FP_NEON(frecps_4, frecps(d0, d1, d2)) 3621 TEST_FP_NEON_NEONHALF(frecps_0, frecps(v0.V4H(), v1.V4H(), v2.V4H())) 3622 TEST_FP_NEON_NEONHALF(frecps_1, frecps(v0.V8H(), v1.V8H(), v2.V8H())) 3623 TEST_FP_NEON_NEONHALF(frecps_2, frecps(h0, h1, h2))
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 478 0x~~~~~~~~~~~~~~~~ 5e71ff4b frecps d11, d26, d17 479 0x~~~~~~~~~~~~~~~~ 5e21ff72 frecps s18, s27, s1 2339 0x~~~~~~~~~~~~~~~~ 4e7afcf6 frecps v22.2d, v7.2d, v26.2d 2340 0x~~~~~~~~~~~~~~~~ 0e22ff7f frecps v31.2s, v27.2s, v2.2s 2341 0x~~~~~~~~~~~~~~~~ 4e3bfcd2 frecps v18.4s, v6.4s, v27.4s
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