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/external/perfetto/test/trace_processor/
Dcpu_counters_b120487929.out9 0,"freq",300000.000000,26469061
10 0,"freq",364800.000000,1570207
11 0,"freq",441600.000000,574478
12 0,"freq",518400.000000,1582083
13 0,"freq",672000.000000,5274688
14 0,"freq",748800.000000,6291667
15 0,"freq",825600.000000,2777187
16 0,"freq",1171200.000000,1328958506
17 0,"freq",1248000.000000,25806259
18 0,"freq",1324800.000000,20621981
[all …]
/external/ltp/testcases/kernel/device-drivers/v4l/user_space/
Dtest_VIDIOC_FREQUENCY.c37 struct v4l2_frequency freq; in test_VIDIOC_G_FREQUENCY() local
41 memset(&freq, 0xff, sizeof(freq)); in test_VIDIOC_G_FREQUENCY()
42 freq.tuner = tuner; in test_VIDIOC_G_FREQUENCY()
43 ret_get = ioctl(get_video_fd(), VIDIOC_G_FREQUENCY, &freq); in test_VIDIOC_G_FREQUENCY()
52 CU_ASSERT_EQUAL(freq.tuner, tuner); in test_VIDIOC_G_FREQUENCY()
57 CU_ASSERT_EQUAL(freq.reserved[0], 0); in test_VIDIOC_G_FREQUENCY()
58 CU_ASSERT_EQUAL(freq.reserved[1], 0); in test_VIDIOC_G_FREQUENCY()
59 CU_ASSERT_EQUAL(freq.reserved[2], 0); in test_VIDIOC_G_FREQUENCY()
60 CU_ASSERT_EQUAL(freq.reserved[3], 0); in test_VIDIOC_G_FREQUENCY()
61 CU_ASSERT_EQUAL(freq.reserved[4], 0); in test_VIDIOC_G_FREQUENCY()
[all …]
/external/u-boot/arch/arm/cpu/armv7/vf610/
Dgeneric.c43 u32 freq = 0; in get_mcu_main_clk() local
56 freq = FASE_CLK_FREQ; in get_mcu_main_clk()
59 freq = SLOW_CLK_FREQ; in get_mcu_main_clk()
65 freq = PLL2_MAIN_FREQ; in get_mcu_main_clk()
67 freq = PLL2_PFD1_FREQ; in get_mcu_main_clk()
69 freq = PLL2_PFD2_FREQ; in get_mcu_main_clk()
71 freq = PLL2_PFD3_FREQ; in get_mcu_main_clk()
73 freq = PLL2_PFD4_FREQ; in get_mcu_main_clk()
76 freq = PLL2_MAIN_FREQ; in get_mcu_main_clk()
82 freq = PLL1_MAIN_FREQ; in get_mcu_main_clk()
[all …]
/external/u-boot/arch/arm/cpu/armv8/s32v234/
Dgeneric.c97 u32 freq = 0; in get_mcu_main_clk() local
109 freq = FIRC_CLK_FREQ; in get_mcu_main_clk()
112 freq = XOSC_CLK_FREQ; in get_mcu_main_clk()
116 freq = decode_pll(ARM_PLL, XOSC_CLK_FREQ, 0); in get_mcu_main_clk()
125 return freq / coreclk_div; in get_mcu_main_clk()
132 u32 freq = 0; in get_sys_clk() local
156 freq = FIRC_CLK_FREQ; in get_sys_clk()
159 freq = XOSC_CLK_FREQ; in get_sys_clk()
163 freq = decode_pll(ARM_PLL, XOSC_CLK_FREQ, 1); in get_sys_clk()
172 return freq / sysclk_div; in get_sys_clk()
[all …]
/external/u-boot/arch/arm/mach-imx/mx8m/
Dclock.c349 void mxs_set_lcdclk(u32 base_addr, u32 freq) in mxs_set_lcdclk() argument
736 u32 freq; in do_mx8m_showclocks() local
738 freq = decode_frac_pll(ARM_PLL_CLK); in do_mx8m_showclocks()
739 printf("ARM_PLL %8d MHz\n", freq / 1000000); in do_mx8m_showclocks()
740 freq = decode_sscg_pll(SYSTEM_PLL1_800M_CLK); in do_mx8m_showclocks()
741 printf("SYS_PLL1_800 %8d MHz\n", freq / 1000000); in do_mx8m_showclocks()
742 freq = decode_sscg_pll(SYSTEM_PLL1_400M_CLK); in do_mx8m_showclocks()
743 printf("SYS_PLL1_400 %8d MHz\n", freq / 1000000); in do_mx8m_showclocks()
744 freq = decode_sscg_pll(SYSTEM_PLL1_266M_CLK); in do_mx8m_showclocks()
745 printf("SYS_PLL1_266 %8d MHz\n", freq / 1000000); in do_mx8m_showclocks()
[all …]
/external/u-boot/arch/arm/mach-imx/
Dsyscounter.c36 unsigned long freq; in tick_to_time() local
38 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq)); in tick_to_time()
41 do_div(tick, freq); in tick_to_time()
48 unsigned long freq; in us_to_tick() local
50 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq)); in us_to_tick()
52 usec = usec * freq + 999999; in us_to_tick()
61 unsigned long val, freq; in timer_init() local
63 freq = CONFIG_SC_TIMER_CLK; in timer_init()
64 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); in timer_init()
66 writel(freq, &sctr->cntfid0); in timer_init()
[all …]
/external/adhd/cras-config/peppy_freon/
Ddsp.ini57 input_5=248 ; freq
61 input_9=688 ; freq
65 input_13=410 ; freq
69 input_17=817 ; freq
73 input_21=5112 ; freq
77 input_25=4827 ; freq
81 input_29=819 ; freq
85 input_33=4065 ; freq
89 input_37=4065 ; freq
93 input_41=2292 ; freq
[all …]
/external/adhd/cras-config/auron_yuna/
Ddsp.ini57 input_5=150 ; freq
61 input_9=150 ; freq
65 input_13=285 ; freq
69 input_17=300 ; freq
73 input_21=600 ; freq
77 input_25=600 ; freq
81 input_29=4000 ; freq
85 input_33=4000 ; freq
89 input_37=960 ; freq
93 input_41=960 ; freq
[all …]
/external/adhd/cras-config/veyron_mighty/
Ddsp.ini57 input_5=250 ; freq
61 input_9=300 ; freq
65 input_13=500 ; freq
69 input_17=500 ; freq
73 input_21=800 ; freq
77 input_25=800 ; freq
81 input_29=1000 ; freq
85 input_33=1000 ; freq
89 input_37=2600 ; freq
93 input_41=2600 ; freq
[all …]
/external/adhd/cras-config/peppy/
Ddsp.ini57 input_5=248 ; freq
61 input_9=688 ; freq
65 input_13=410 ; freq
69 input_17=817 ; freq
73 input_21=5112 ; freq
77 input_25=4827 ; freq
81 input_29=819 ; freq
85 input_33=4065 ; freq
89 input_37=4065 ; freq
93 input_41=2292 ; freq
[all …]
/external/adhd/cras-config/veyron_jaq/
Ddsp.ini57 input_5=250 ; freq
61 input_9=250 ; freq
65 input_13=400 ; freq
69 input_17=400 ; freq
73 input_21=630 ; freq
77 input_25=630 ; freq
81 input_29=1500 ; freq
85 input_33=1500 ; freq
89 input_37=2200 ; freq
93 input_41=2200 ; freq
[all …]
/external/adhd/cras-config/auron/
Ddsp.ini57 input_5=248 ; freq
61 input_9=688 ; freq
65 input_13=410 ; freq
69 input_17=817 ; freq
73 input_21=5112 ; freq
77 input_25=4827 ; freq
81 input_29=819 ; freq
85 input_33=4065 ; freq
89 input_37=4065 ; freq
93 input_41=2292 ; freq
[all …]
/external/adhd/cras-config/auron_paine/
Ddsp.ini57 input_5=248 ; freq
61 input_9=688 ; freq
65 input_13=410 ; freq
69 input_17=817 ; freq
73 input_21=5112 ; freq
77 input_25=4827 ; freq
81 input_29=819 ; freq
85 input_33=4065 ; freq
89 input_37=4065 ; freq
93 input_41=2292 ; freq
[all …]
/external/u-boot/arch/arm/cpu/armv7/ls102xa/
Dtimer.c33 unsigned long freq; in tick_to_time() local
35 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq)); in tick_to_time()
38 do_div(tick, freq); in tick_to_time()
45 unsigned long freq; in us_to_tick() local
47 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq)); in us_to_tick()
49 usec = usec * freq + 999999; in us_to_tick()
58 unsigned long ctrl, freq; in timer_init() local
64 freq = COUNTER_FREQUENCY; in timer_init()
65 asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); in timer_init()
122 unsigned long freq; in get_tbclk() local
[all …]
/external/u-boot/arch/arm/mach-imx/mx5/
Dclock.c254 u32 reg, freq; in get_mcu_main_clk() local
257 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_mcu_main_clk()
258 return freq / (reg + 1); in get_mcu_main_clk()
290 uint32_t freq, reg, div; in get_ipg_clk() local
292 freq = get_ahb_clk(); in get_ipg_clk()
297 return freq / div; in get_ipg_clk()
305 u32 freq, pred1, pred2, podf; in get_ipg_per_clk() local
311 freq = get_lp_apm(); in get_ipg_per_clk()
313 freq = get_periph_clk(); in get_ipg_per_clk()
318 return freq / ((pred1 + 1) * (pred2 + 1) * (podf + 1)); in get_ipg_per_clk()
[all …]
/external/u-boot/arch/arm/mach-at91/armv7/
Dclock.c39 static u32 at91_pll_rate(u32 freq, u32 reg) in at91_pll_rate() argument
46 freq /= div; in at91_pll_rate()
47 freq *= mul + 1; in at91_pll_rate()
49 freq = 0; in at91_pll_rate()
52 return freq; in at91_pll_rate()
57 unsigned freq, mckr; in at91_clock_init() local
91 freq = gd->arch.mck_rate_hz; in at91_clock_init()
94 freq >>= mckr & AT91_PMC_MCKR_PRES_MASK; in at91_clock_init()
98 gd->arch.mck_rate_hz = freq / 2; in at91_clock_init()
101 gd->arch.mck_rate_hz = freq / 3; in at91_clock_init()
[all …]
/external/adhd/cras-config/falco/
Ddsp.ini57 input_5=200 ; freq
61 input_9=200 ; freq
65 input_13=350 ; freq
69 input_17=350 ; freq
73 input_21=1000 ; freq
77 input_25=1000 ; freq
81 input_29=5000 ; freq
85 input_33=5000 ; freq
89 input_37=8000 ; freq
93 input_41=8000 ; freq
[all …]
/external/adhd/cras-config/daisy_skate/
Ddsp.ini57 input_5=200 ; freq
61 input_9=200 ; freq
65 input_13=350 ; freq
69 input_17=350 ; freq
73 input_21=1000 ; freq
77 input_25=1000 ; freq
81 input_29=5000 ; freq
85 input_33=5000 ; freq
89 input_37=8000 ; freq
93 input_41=8000 ; freq
[all …]
/external/adhd/cras-config/glimmer-cheets/
Ddsp.ini57 input_5=420 ; freq
61 input_9=435 ; freq
65 input_13=516 ; freq
69 input_17=520 ; freq
73 input_21=750 ; freq
77 input_25=745 ; freq
81 input_29=1090 ; freq
85 input_33=1050 ; freq
89 input_37=2000 ; freq
93 input_41=1850 ; freq
[all …]
/external/adhd/cras-config/cyan/
Ddsp.ini57 input_5=250 ; freq
61 input_9=250 ; freq
65 input_13=649 ; freq
69 input_17=649 ; freq
73 input_21=1200 ; freq
77 input_25=1200 ; freq
81 input_29=10000 ; freq
85 input_33=10000 ; freq
89 input_37=6070 ; freq
93 input_41=6070 ; freq
[all …]
/external/wpa_supplicant_8/src/common/
Dieee802_11_common.c703 enum hostapd_hw_mode ieee80211_freq_to_chan(int freq, u8 *channel) in ieee80211_freq_to_chan() argument
707 return ieee80211_freq_to_channel_ext(freq, 0, VHT_CHANWIDTH_USE_HT, in ieee80211_freq_to_chan()
722 enum hostapd_hw_mode ieee80211_freq_to_channel_ext(unsigned int freq, in ieee80211_freq_to_channel_ext() argument
733 if (freq >= 2412 && freq <= 2472) { in ieee80211_freq_to_channel_ext()
734 if ((freq - 2407) % 5) in ieee80211_freq_to_channel_ext()
748 *channel = (freq - 2407) / 5; in ieee80211_freq_to_channel_ext()
753 if (freq == 2484) { in ieee80211_freq_to_channel_ext()
763 if (freq >= 4900 && freq < 5000) { in ieee80211_freq_to_channel_ext()
764 if ((freq - 4000) % 5) in ieee80211_freq_to_channel_ext()
766 *channel = (freq - 4000) / 5; in ieee80211_freq_to_channel_ext()
[all …]
Dhw_features_common.c20 int chan, int *freq) in hw_get_channel_chan() argument
24 if (freq) in hw_get_channel_chan()
25 *freq = 0; in hw_get_channel_chan()
33 if (freq) in hw_get_channel_chan()
34 *freq = ch->freq; in hw_get_channel_chan()
44 int freq, int *chan) in hw_get_channel_freq() argument
56 if (ch->freq == freq) { in hw_get_channel_freq()
69 int freq; in hw_get_freq() local
71 hw_get_channel_chan(mode, chan, &freq); in hw_get_freq()
73 return freq; in hw_get_freq()
[all …]
/external/u-boot/arch/arm/mach-keystone/
Dclock.c345 unsigned long freq = 0; in ks_clk_get_rate() local
349 freq = pll_freq_get(CORE_PLL); in ks_clk_get_rate()
352 freq = pll_freq_get(PASS_PLL); in ks_clk_get_rate()
356 freq = pll_freq_get(TETRIS_PLL); in ks_clk_get_rate()
359 freq = pll_freq_get(DDR3A_PLL); in ks_clk_get_rate()
363 freq = pll_freq_get(DDR3B_PLL); in ks_clk_get_rate()
367 freq = pll_freq_get(UART_PLL); in ks_clk_get_rate()
371 freq = pll_freq_get(CORE_PLL) / pll0div_read(1); in ks_clk_get_rate()
377 freq = pll_freq_get(CORE_PLL) / pll0div_read(3); in ks_clk_get_rate()
380 freq = pll_freq_get(CORE_PLL) / pll0div_read(4); in ks_clk_get_rate()
[all …]
/external/wpa_supplicant_8/src/ap/
Ddfs.c126 dfs_get_chan_data(struct hostapd_hw_modes *mode, int freq, int first_chan_idx) in dfs_get_chan_data() argument
131 if (mode->channels[i].freq == freq) in dfs_get_chan_data()
159 chan = dfs_get_chan_data(mode, first_chan->freq + i * 20, in dfs_chan_range_available()
485 static int set_dfs_state_freq(struct hostapd_iface *iface, int freq, u32 state) in set_dfs_state_freq() argument
495 wpa_printf(MSG_DEBUG, "set_dfs_state 0x%X for %d MHz", state, freq); in set_dfs_state_freq()
498 if (chan->freq == freq) { in set_dfs_state_freq()
506 wpa_printf(MSG_WARNING, "Can't set DFS state for freq %d MHz", freq); in set_dfs_state_freq()
511 static int set_dfs_state(struct hostapd_iface *iface, int freq, int ht_enabled, in set_dfs_state() argument
517 int frequency = freq; in set_dfs_state()
566 static int dfs_are_channels_overlapped(struct hostapd_iface *iface, int freq, in dfs_are_channels_overlapped() argument
[all …]
/external/adhd/cras-config/wolf/
Ddsp.ini57 input_5=200 ; freq
61 input_9=200 ; freq
65 input_13=794 ; freq
69 input_17=794 ; freq
73 input_21=1491 ; freq
77 input_25=1491 ; freq
81 input_29=399 ; freq
85 input_33=399 ; freq
89 input_37=2645 ; freq
93 input_41=2645 ; freq
[all …]

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