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Searched refs:fs0 (Results 1 – 19 of 19) sorted by relevance

/external/u-boot/arch/arm/dts/
Dstih407-clock.dtsi125 clock-output-names = "clk-s-c0-fs0-ch0",
126 "clk-s-c0-fs0-ch1",
127 "clk-s-c0-fs0-ch2",
128 "clk-s-c0-fs0-ch3";
207 clock-output-names = "clk-s-d0-fs0-ch0",
208 "clk-s-d0-fs0-ch1",
209 "clk-s-d0-fs0-ch2",
210 "clk-s-d0-fs0-ch3";
241 clock-output-names = "clk-s-d2-fs0-ch0",
242 "clk-s-d2-fs0-ch1",
[all …]
Dstih410-clock.dtsi130 clock-output-names = "clk-s-c0-fs0-ch0",
131 "clk-s-c0-fs0-ch1",
132 "clk-s-c0-fs0-ch2",
133 "clk-s-c0-fs0-ch3";
134 clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
226 clock-output-names = "clk-s-d0-fs0-ch0",
227 "clk-s-d0-fs0-ch1",
228 "clk-s-d0-fs0-ch2",
229 "clk-s-d0-fs0-ch3";
262 clock-output-names = "clk-s-d2-fs0-ch0",
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/
Dcompress-rv32f.s23 flw fs0, 124(s0)
25 # CHECK-ALIAS: flw fs0, 124(s0)
26 # CHECK-INST: c.flw fs0, 124(s0)
28 fsw fs0, 124(s0)
30 # CHECK-ALIAS: fsw fs0, 124(s0)
31 # CHECK-INST: c.fsw fs0, 124(s0)
Dcompress-rv32d.s35 fld fs0, 248(s0)
37 # CHECK-ALIAS: fld fs0, 248(s0)
38 # CHECK-INST: c.fld fs0, 248(s0)
40 fsd fs0, 248(s0)
42 # CHECK-ALIAS: fsd fs0, 248(s0)
43 # CHECK-INST: c.fsd fs0, 248(s0)
Drv64dc-valid.s13 # CHECK-INST: c.fldsp fs0, 504(sp)
16 c.fldsp fs0, 504(sp)
Drv32dc-valid.s13 # CHECK-INST: c.fldsp fs0, 504(sp)
16 c.fldsp fs0, 504(sp)
Drv32fc-valid.s17 # CHECK-INST: c.flwsp fs0, 252(sp)
20 c.flwsp fs0, 252(sp)
Drv32dc-invalid.s11 c.fld fs0, -8(sp) # CHECK: :[[@LINE]]:13: error: immediate must be a multiple of 8 bytes in the ra…
Drv32fc-invalid.s11 c.flw fs0, -4(sp) # CHECK: :[[@LINE]]:13: error: immediate must be a multiple of 4 bytes in the ra…
Drvd-aliases-valid.s42 # CHECK-INST: fle.d t2, fs1, fs0
43 # CHECK-ALIAS: fle.d t2, fs1, fs0
Drvf-aliases-valid.s42 # CHECK-INST: fle.s t2, fs1, fs0
43 # CHECK-ALIAS: fle.s t2, fs1, fs0
Drv32d-valid.s42 # CHECK-INST: fsd fs0, -2048(s6)
Drv32f-valid.s37 # CHECK-INST: fsw fs0, -2048(s6)
/external/libopus/celt/
Dlaplace.c44 static unsigned ec_laplace_get_freq1(unsigned fs0, int decay) in ec_laplace_get_freq1() argument
47 ft = 32768 - LAPLACE_MINP*(2*LAPLACE_NMIN) - fs0; in ec_laplace_get_freq1()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/RISCV/
Dinterrupt-attr.ll132 ; CHECK-RV32-F-NEXT: fsw fs0, 44(sp)
156 ; CHECK-RV32-F-NEXT: flw fs0, 44(sp)
235 ; CHECK-RV32-FD-NEXT: fsd fs0, 88(sp)
259 ; CHECK-RV32-FD-NEXT: fld fs0, 88(sp)
377 ; CHECK-RV64-F-NEXT: fsw fs0, 44(sp)
401 ; CHECK-RV64-F-NEXT: flw fs0, 44(sp)
480 ; CHECK-RV64-FD-NEXT: fsd fs0, 88(sp)
504 ; CHECK-RV64-FD-NEXT: fld fs0, 88(sp)
634 ; CHECK-RV32-F-NEXT: fsw fs0, 56(sp)
659 ; CHECK-RV32-F-NEXT: flw fs0, 56(sp)
[all …]
/external/u-boot/doc/
DREADME.u-boot_on_efi100 type 'fs0:u-boot-payload.efi' to run the payload or 'fs0:u-boot-app.efi' to
107 fs0:u-boot-payload.efi
109 (or fs0:u-boot-app.efi for the application)
/external/google-breakpad/src/common/android/
Dbreakpad_getcontext.S296 s.d fs0, (20 * MCONTEXT_REG_SIZE + MCONTEXT_FPREGS_OFFSET)(a0)
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVRegisterInfo.td171 def F8_32 : RISCVReg32<8, "f8", ["fs0"]>, DwarfRegNum<[40]>;
/external/elfutils/tests/
Drun-allregs.sh2951 40: fs0 (fs0), float 64 bits