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Searched refs:fui (Results 1 – 25 of 76) sorted by relevance

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/external/mesa3d/src/gallium/drivers/i915/
Di915_prim_emit.c83 OUT_BATCH( fui(attrib[0]) ); in emit_hw_vertex()
87 OUT_BATCH( fui(attrib[0]) ); in emit_hw_vertex()
88 OUT_BATCH( fui(attrib[1]) ); in emit_hw_vertex()
92 OUT_BATCH( fui(attrib[0]) ); in emit_hw_vertex()
93 OUT_BATCH( fui(attrib[1]) ); in emit_hw_vertex()
94 OUT_BATCH( fui(attrib[2]) ); in emit_hw_vertex()
98 OUT_BATCH( fui(attrib[0]) ); in emit_hw_vertex()
99 OUT_BATCH( fui(attrib[1]) ); in emit_hw_vertex()
100 OUT_BATCH( fui(attrib[2]) ); in emit_hw_vertex()
101 OUT_BATCH( fui(attrib[3]) ); in emit_hw_vertex()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_viewport.c208 radeon_emit(cs, fui(guardband_y)); /* R_028BE8_PA_CL_GB_VERT_CLIP_ADJ */ in si_emit_guardband()
209 radeon_emit(cs, fui(discard_y)); /* R_028BEC_PA_CL_GB_VERT_DISC_ADJ */ in si_emit_guardband()
210 radeon_emit(cs, fui(guardband_x)); /* R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ */ in si_emit_guardband()
211 radeon_emit(cs, fui(discard_x)); /* R_028BF4_PA_CL_GB_HORZ_DISC_ADJ */ in si_emit_guardband()
293 radeon_emit(cs, fui(state->scale[0])); in si_emit_one_viewport()
294 radeon_emit(cs, fui(state->translate[0])); in si_emit_one_viewport()
295 radeon_emit(cs, fui(state->scale[1])); in si_emit_one_viewport()
296 radeon_emit(cs, fui(state->translate[1])); in si_emit_one_viewport()
297 radeon_emit(cs, fui(state->scale[2])); in si_emit_one_viewport()
298 radeon_emit(cs, fui(state->translate[2])); in si_emit_one_viewport()
[all …]
/external/mesa3d/src/gallium/drivers/r600/
Dr600_viewport.c230 radeon_emit(cs, fui(guardband_y)); /* R_028BE8_PA_CL_GB_VERT_CLIP_ADJ */ in r600_emit_guardband()
231 radeon_emit(cs, fui(1.0)); /* R_028BEC_PA_CL_GB_VERT_DISC_ADJ */ in r600_emit_guardband()
232 radeon_emit(cs, fui(guardband_x)); /* R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ */ in r600_emit_guardband()
233 radeon_emit(cs, fui(1.0)); /* R_028BF4_PA_CL_GB_HORZ_DISC_ADJ */ in r600_emit_guardband()
311 radeon_emit(cs, fui(state->scale[0])); in r600_emit_one_viewport()
312 radeon_emit(cs, fui(state->translate[0])); in r600_emit_one_viewport()
313 radeon_emit(cs, fui(state->scale[1])); in r600_emit_one_viewport()
314 radeon_emit(cs, fui(state->translate[1])); in r600_emit_one_viewport()
315 radeon_emit(cs, fui(state->scale[2])); in r600_emit_one_viewport()
316 radeon_emit(cs, fui(state->translate[2])); in r600_emit_one_viewport()
[all …]
/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_rasterizer.c56 cs->PA_LINE_WIDTH = fui(so->line_width / 2.0f); in etna_rasterizer_state_create()
57 cs->PA_POINT_SIZE = fui(so->point_size / 2.0f); in etna_rasterizer_state_create()
58 cs->SE_DEPTH_SCALE = fui(so->offset_scale); in etna_rasterizer_state_create()
59 cs->SE_DEPTH_BIAS = fui(so->offset_units) / 65535.0f; in etna_rasterizer_state_create()
Detnaviv_state.c233 cs->PE_DEPTH_NORMALIZE = fui(exp2f(depth_bits) - 1.0f); in etna_set_framebuffer_state()
383 cs->PA_VIEWPORT_SCALE_Z = fui(vs->scale[2] * 2.0f); in etna_set_viewport_states()
386 cs->PA_VIEWPORT_OFFSET_Z = fui(vs->translate[2] - vs->scale[2]); in etna_set_viewport_states()
400 cs->PE_DEPTH_NEAR = fui(0.0); /* not affected if depth mode is Z (as in GL) */ in etna_set_viewport_states()
401 cs->PE_DEPTH_FAR = fui(1.0); in etna_set_viewport_states()
Detnaviv_uniforms.c57 return fui(1.0f / dim); in get_texrect_scale()
/external/mesa3d/src/gallium/drivers/freedreno/a2xx/
Dfd2_gmem.c249 OUT_RING(ring, fui(x0)); in fd2_emit_tile_mem2gmem()
250 OUT_RING(ring, fui(y0)); in fd2_emit_tile_mem2gmem()
251 OUT_RING(ring, fui(x1)); in fd2_emit_tile_mem2gmem()
252 OUT_RING(ring, fui(y0)); in fd2_emit_tile_mem2gmem()
253 OUT_RING(ring, fui(x0)); in fd2_emit_tile_mem2gmem()
254 OUT_RING(ring, fui(y1)); in fd2_emit_tile_mem2gmem()
255 OUT_RING(ring, fui(x1)); in fd2_emit_tile_mem2gmem()
256 OUT_RING(ring, fui(y1)); in fd2_emit_tile_mem2gmem()
310 OUT_RING(ring, fui((float)bin_w/2.0)); /* PA_CL_VPORT_XSCALE */ in fd2_emit_tile_mem2gmem()
311 OUT_RING(ring, fui((float)bin_w/2.0)); /* PA_CL_VPORT_XOFFSET */ in fd2_emit_tile_mem2gmem()
[all …]
Dfd2_emit.c239 OUT_RING(ring, fui(1.0)); /* PA_CL_GB_VERT_CLIP_ADJ */ in fd2_emit_state()
240 OUT_RING(ring, fui(1.0)); /* PA_CL_GB_VERT_DISC_ADJ */ in fd2_emit_state()
241 OUT_RING(ring, fui(1.0)); /* PA_CL_GB_HORZ_CLIP_ADJ */ in fd2_emit_state()
242 OUT_RING(ring, fui(1.0)); /* PA_CL_GB_HORZ_DISC_ADJ */ in fd2_emit_state()
264 OUT_RING(ring, fui(ctx->viewport.scale[0])); /* PA_CL_VPORT_XSCALE */ in fd2_emit_state()
265 OUT_RING(ring, fui(ctx->viewport.translate[0])); /* PA_CL_VPORT_XOFFSET */ in fd2_emit_state()
266 OUT_RING(ring, fui(ctx->viewport.scale[1])); /* PA_CL_VPORT_YSCALE */ in fd2_emit_state()
267 OUT_RING(ring, fui(ctx->viewport.translate[1])); /* PA_CL_VPORT_YOFFSET */ in fd2_emit_state()
268 OUT_RING(ring, fui(ctx->viewport.scale[2])); /* PA_CL_VPORT_ZSCALE */ in fd2_emit_state()
269 OUT_RING(ring, fui(ctx->viewport.translate[2])); /* PA_CL_VPORT_ZOFFSET */ in fd2_emit_state()
Da2xx.xml.h878 return ((fui(val)) << A2XX_PA_CL_VPORT_XSCALE__SHIFT) & A2XX_PA_CL_VPORT_XSCALE__MASK; in A2XX_PA_CL_VPORT_XSCALE()
886 return ((fui(val)) << A2XX_PA_CL_VPORT_XOFFSET__SHIFT) & A2XX_PA_CL_VPORT_XOFFSET__MASK; in A2XX_PA_CL_VPORT_XOFFSET()
894 return ((fui(val)) << A2XX_PA_CL_VPORT_YSCALE__SHIFT) & A2XX_PA_CL_VPORT_YSCALE__MASK; in A2XX_PA_CL_VPORT_YSCALE()
902 return ((fui(val)) << A2XX_PA_CL_VPORT_YOFFSET__SHIFT) & A2XX_PA_CL_VPORT_YOFFSET__MASK; in A2XX_PA_CL_VPORT_YOFFSET()
910 return ((fui(val)) << A2XX_PA_CL_VPORT_ZSCALE__SHIFT) & A2XX_PA_CL_VPORT_ZSCALE__MASK; in A2XX_PA_CL_VPORT_ZSCALE()
918 return ((fui(val)) << A2XX_PA_CL_VPORT_ZOFFSET__SHIFT) & A2XX_PA_CL_VPORT_ZOFFSET__MASK; in A2XX_PA_CL_VPORT_ZOFFSET()
1585 return ((fui(val)) << A2XX_PA_CL_GB_VERT_CLIP_ADJ__SHIFT) & A2XX_PA_CL_GB_VERT_CLIP_ADJ__MASK; in A2XX_PA_CL_GB_VERT_CLIP_ADJ()
1593 return ((fui(val)) << A2XX_PA_CL_GB_VERT_DISC_ADJ__SHIFT) & A2XX_PA_CL_GB_VERT_DISC_ADJ__MASK; in A2XX_PA_CL_GB_VERT_DISC_ADJ()
1601 return ((fui(val)) << A2XX_PA_CL_GB_HORZ_CLIP_ADJ__SHIFT) & A2XX_PA_CL_GB_HORZ_CLIP_ADJ__MASK; in A2XX_PA_CL_GB_HORZ_CLIP_ADJ()
1609 return ((fui(val)) << A2XX_PA_CL_GB_HORZ_DISC_ADJ__SHIFT) & A2XX_PA_CL_GB_HORZ_DISC_ADJ__MASK; in A2XX_PA_CL_GB_HORZ_DISC_ADJ()
Dfd2_compiler.c867 get_immediate(ctx, &tmp_const, fui(c0)); in translate_sge_slt()
870 get_immediate(ctx, &tmp_const, fui(c1)); in translate_sge_slt()
888 get_immediate(ctx, &tmp_const, fui(1.0)); in translate_lrp()
949 get_immediate(ctx, &tmp_const, fui(0.5)); in translate_trig()
952 get_immediate(ctx, &tmp_const, fui(0.159155)); in translate_trig()
962 get_immediate(ctx, &tmp_const, fui(-3.141593)); in translate_trig()
965 get_immediate(ctx, &tmp_const, fui(6.283185)); in translate_trig()
Dfd2_zsa.c92 so->rb_alpha_ref = fui(cso->alpha.ref_value); in fd2_zsa_state_create()
/external/mesa3d/src/gallium/auxiliary/util/
Du_pack_color.h522 union fi fui; in util_pack_z() local
538 fui.f = (float)z; in util_pack_z()
539 return fui.ui; in util_pack_z()
564 union fi fui; in util_pack64_z() local
571 fui.f = (float)z; in util_pack64_z()
572 return fui.ui; in util_pack64_z()
/external/mesa3d/src/gallium/drivers/virgl/
Dvirgl_encode.c144 virgl_encoder_write_dword(ctx->cbuf, fui(dsa_state->alpha.ref_value)); in virgl_encode_dsa_state()
186 virgl_encoder_write_dword(ctx->cbuf, fui(state->point_size)); /* S1 */ in virgl_encode_rasterizer_state()
192 virgl_encoder_write_dword(ctx->cbuf, fui(state->line_width)); /* S4 */ in virgl_encode_rasterizer_state()
193 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_units)); /* S5 */ in virgl_encode_rasterizer_state()
194 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_scale)); /* S6 */ in virgl_encode_rasterizer_state()
195 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_clamp)); /* S7 */ in virgl_encode_rasterizer_state()
361 virgl_encoder_write_dword(ctx->cbuf, fui(states[v].scale[i])); in virgl_encoder_set_viewport_states()
363 virgl_encoder_write_dword(ctx->cbuf, fui(states[v].translate[i])); in virgl_encoder_set_viewport_states()
558 virgl_encoder_write_dword(ctx->cbuf, fui(state->lod_bias)); in virgl_encode_sampler_state()
559 virgl_encoder_write_dword(ctx->cbuf, fui(state->min_lod)); in virgl_encode_sampler_state()
[all …]
/external/virglrenderer/tests/
Dtestvirgl_encode.c137 virgl_encoder_write_dword(ctx->cbuf, fui(dsa_state->alpha.ref_value)); in virgl_encode_dsa_state()
179 virgl_encoder_write_dword(ctx->cbuf, fui(state->point_size)); /* S1 */ in virgl_encode_rasterizer_state()
185 virgl_encoder_write_dword(ctx->cbuf, fui(state->line_width)); /* S4 */ in virgl_encode_rasterizer_state()
186 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_units)); /* S5 */ in virgl_encode_rasterizer_state()
187 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_scale)); /* S6 */ in virgl_encode_rasterizer_state()
188 virgl_encoder_write_dword(ctx->cbuf, fui(state->offset_clamp)); /* S7 */ in virgl_encode_rasterizer_state()
347 virgl_encoder_write_dword(ctx->cbuf, fui(states[v].scale[i])); in virgl_encoder_set_viewport_states()
349 virgl_encoder_write_dword(ctx->cbuf, fui(states[v].translate[i])); in virgl_encoder_set_viewport_states()
593 virgl_encoder_write_dword(ctx->cbuf, fui(state->lod_bias)); in virgl_encode_sampler_state()
594 virgl_encoder_write_dword(ctx->cbuf, fui(state->min_lod)); in virgl_encode_sampler_state()
[all …]
/external/mesa3d/src/amd/vulkan/
Dsi_cmd_buffer.c354 radeon_set_context_reg(cs, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64)); in si_emit_config()
356 radeon_set_context_reg(cs, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, fui(0)); in si_emit_config()
402 radeon_set_context_reg(cs, R_0282D4_PA_SC_VPORT_ZMAX_0 + i*8, fui(1.0)); in si_emit_config()
625 radeon_emit(cs, fui(scale[0])); in si_write_viewport()
626 radeon_emit(cs, fui(translate[0])); in si_write_viewport()
627 radeon_emit(cs, fui(scale[1])); in si_write_viewport()
628 radeon_emit(cs, fui(translate[1])); in si_write_viewport()
629 radeon_emit(cs, fui(scale[2])); in si_write_viewport()
630 radeon_emit(cs, fui(translate[2])); in si_write_viewport()
638 radeon_emit(cs, fui(zmin)); in si_write_viewport()
[all …]
/external/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv50_state.c257 SB_DATA (so, fui(cso->line_width)); in nv50_rasterizer_state_create()
273 SB_DATA (so, fui(cso->point_size)); in nv50_rasterizer_state_create()
311 SB_DATA (so, fui(cso->offset_scale)); in nv50_rasterizer_state_create()
313 SB_DATA (so, fui(cso->offset_units * 2.0f)); in nv50_rasterizer_state_create()
315 SB_DATA (so, fui(cso->offset_clamp)); in nv50_rasterizer_state_create()
382 SB_DATA (so, fui(cso->depth.bounds_min)); in nv50_zsa_state_create()
383 SB_DATA (so, fui(cso->depth.bounds_max)); in nv50_zsa_state_create()
423 SB_DATA (so, fui(cso->alpha.ref_value)); in nv50_zsa_state_create()
432 SB_DATA (so, fui(cso->alpha.ref_value)); in nv50_zsa_state_create()
574 so->tsc[4] = fui(cso->border_color.f[0]); in nv50_sampler_state_create()
[all …]
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnv30_state.c169 SB_DATA (so, fui(cso->offset_scale)); in nv30_rasterizer_state_create()
170 SB_DATA (so, fui(cso->offset_units * 2.0)); in nv30_rasterizer_state_create()
186 SB_DATA (so, fui(cso->point_size)); in nv30_rasterizer_state_create()
230 SB_DATA (so, fui(cso->depth.bounds_min)); in nv30_zsa_state_create()
231 SB_DATA (so, fui(cso->depth.bounds_max)); in nv30_zsa_state_create()
/external/mesa3d/src/gallium/drivers/nouveau/nvc0/
Dnvc0_surface.c719 PUSH_DATA (push, fui(depth)); in nvc0_clear()
1354 *(vbuf++) = fui(0.0f); in nvc0_blit_3d()
1355 *(vbuf++) = fui(0.0f); in nvc0_blit_3d()
1356 *(vbuf++) = fui(x0); in nvc0_blit_3d()
1357 *(vbuf++) = fui(y0); in nvc0_blit_3d()
1358 *(vbuf++) = fui(z); in nvc0_blit_3d()
1360 *(vbuf++) = fui(32768 << nv50_miptree(dst)->ms_x); in nvc0_blit_3d()
1361 *(vbuf++) = fui(0.0f); in nvc0_blit_3d()
1362 *(vbuf++) = fui(x1); in nvc0_blit_3d()
1363 *(vbuf++) = fui(y0); in nvc0_blit_3d()
[all …]
Dnvc0_state.c240 SB_DATA (so, fui(cso->line_width)); in nvc0_rasterizer_state_create()
253 SB_DATA (so, fui(cso->point_size)); in nvc0_rasterizer_state_create()
302 SB_DATA (so, fui(cso->offset_scale)); in nvc0_rasterizer_state_create()
305 SB_DATA (so, fui(cso->offset_units * 2.0f)); in nvc0_rasterizer_state_create()
308 SB_DATA (so, fui(cso->offset_clamp)); in nvc0_rasterizer_state_create()
364 SB_DATA (so, fui(cso->depth.bounds_min)); in nvc0_zsa_state_create()
365 SB_DATA (so, fui(cso->depth.bounds_max)); in nvc0_zsa_state_create()
401 SB_DATA (so, fui(cso->alpha.ref_value)); in nvc0_zsa_state_create()
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_cl.h153 cl_u32(cl, fui(f)); in cl_f()
159 cl_aligned_u32(cl, fui(f)); in cl_aligned_f()
/external/mesa3d/src/gallium/drivers/vc5/
Dvc5_cl.h163 cl_u32(cl, fui(f)); in cl_f()
169 cl_aligned_u32(cl, fui(f)); in cl_aligned_f()
/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Da5xx.xml.h2686 return ((fui(val)) << A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK; in A5XX_GRAS_CL_VPORT_XOFFSET_0()
2694 return ((fui(val)) << A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_XSCALE_0__MASK; in A5XX_GRAS_CL_VPORT_XSCALE_0()
2702 return ((fui(val)) << A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK; in A5XX_GRAS_CL_VPORT_YOFFSET_0()
2710 return ((fui(val)) << A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_YSCALE_0__MASK; in A5XX_GRAS_CL_VPORT_YSCALE_0()
2718 return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK; in A5XX_GRAS_CL_VPORT_ZOFFSET_0()
2726 return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK; in A5XX_GRAS_CL_VPORT_ZSCALE_0()
2775 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_SCALE__MAS… in A5XX_GRAS_SU_POLY_OFFSET_SCALE()
2783 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFFSET__M… in A5XX_GRAS_SU_POLY_OFFSET_OFFSET()
2791 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFF… in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP()
3189 return ((fui(val)) << A5XX_RB_BLEND_RED_F32__SHIFT) & A5XX_RB_BLEND_RED_F32__MASK; in A5XX_RB_BLEND_RED_F32()
[all …]
/external/mesa3d/src/gallium/drivers/freedreno/a4xx/
Da4xx.xml.h1095 return ((fui(val)) << A4XX_RB_BLEND_RED_F32__SHIFT) & A4XX_RB_BLEND_RED_F32__MASK; in A4XX_RB_BLEND_RED_F32()
1123 return ((fui(val)) << A4XX_RB_BLEND_GREEN_F32__SHIFT) & A4XX_RB_BLEND_GREEN_F32__MASK; in A4XX_RB_BLEND_GREEN_F32()
1151 return ((fui(val)) << A4XX_RB_BLEND_BLUE_F32__SHIFT) & A4XX_RB_BLEND_BLUE_F32__MASK; in A4XX_RB_BLEND_BLUE_F32()
1179 return ((fui(val)) << A4XX_RB_BLEND_ALPHA_F32__SHIFT) & A4XX_RB_BLEND_ALPHA_F32__MASK; in A4XX_RB_BLEND_ALPHA_F32()
3188 return ((fui(val)) << A4XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_XOFFSET_0__MASK; in A4XX_GRAS_CL_VPORT_XOFFSET_0()
3196 return ((fui(val)) << A4XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_XSCALE_0__MASK; in A4XX_GRAS_CL_VPORT_XSCALE_0()
3204 return ((fui(val)) << A4XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_YOFFSET_0__MASK; in A4XX_GRAS_CL_VPORT_YOFFSET_0()
3212 return ((fui(val)) << A4XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_YSCALE_0__MASK; in A4XX_GRAS_CL_VPORT_YSCALE_0()
3220 return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZOFFSET_0__MASK; in A4XX_GRAS_CL_VPORT_ZOFFSET_0()
3228 return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZSCALE_0__MASK; in A4XX_GRAS_CL_VPORT_ZSCALE_0()
[all …]
/external/mesa3d/src/gallium/drivers/r300/
Dr300_cb.h128 OUT_CB(fui(value));
Dr300_cs.h80 OUT_CS(fui(value))

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