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/external/clang/test/CodeGen/
Dbitfield-2.c213 struct s5 g5 = { 0xdeadbeef, 0xdeadbeef }; variable
229 struct s5 g5 = { 0xdeadbeef, 0xdeadbeef, 0xdeadbeef }; in test_5() local
231 res ^= g5.f0 ^ g5.f1 ^ g5.f2; in test_5()
232 res ^= f5_load(&g5) ^ f5_store(&g5) ^ f5_reload(&g5); in test_5()
233 res ^= g5.f0 ^ g5.f1 ^ g5.f2; in test_5()
/external/mesa3d/src/mesa/sparc/
Dsparc_clip.S107 ld [%i0 + 0x0c], %g5 ! LSU Group
110 addcc %g5, %g5, %g5 ! IEU1 Group
114 subcc %g5, %g4, %g0 ! IEU1 Group
119 subcc %g5, %g4, %g0 ! IEU1 Group
124 subcc %g5, %g4, %g0 ! IEU1 Group
194 1: ld [%i0 + 0x0c], %g5 ! LSU Group
196 addcc %g5, %g5, %g5 ! IEU1 Group
200 subcc %g5, %g4, %g0 ! IEU1 Group
205 subcc %g5, %g4, %g0 ! IEU1 Group
210 subcc %g5, %g4, %g0 ! IEU1 Group
/external/deqp-deps/glslang/Test/
D430AofA.frag8 float g5[5][7];
69 g4 = foo(g5);
70 g5 = g4; // ERROR, wrong types
74 bar(g5);
76 if (foo(g5) == g4)
78 if (foo(g5) == g5) // ERROR, different types
D310AofA.vert42 float g5[5][7];
77 g4 = foo(g5);
78 g5 = g4; // ERROR, wrong types
82 bar(g5);
84 if (foo(g5) == g4)
86 if (foo(g5) == g5) // ERROR, different types
Darray100.frag5 float g5[5];
24 g4 = foo(g5); // ERROR
25 g5 = g4; // ERROR
29 bar(g5);
Dspv.AofA.frag13 in float g5[5][7];
29 g4 = foo(g5);
31 // if (foo(g5) == g4)
Darray.frag5 float g5[5];
29 g4 = foo(g5);
30 g5 = g4; // ERROR
34 bar(g5);
/external/llvm/test/CodeGen/SPARC/
D64spill.ll13 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
24 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
35 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
47 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
58 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
69 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
80 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
91 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
102 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
113 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SPARC/
D64spill.ll13 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
24 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
35 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
47 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
58 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
69 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
80 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
91 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
102 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
113 …,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dmemops_global.ll8 @g5 = common global i32 0, align 4
686 %v0 = load i32, i32* @g5, align 4, !tbaa !5
688 store i32 %v1, i32* @g5, align 4, !tbaa !5
696 %v0 = load i32, i32* @g5, align 4, !tbaa !5
698 store i32 %v1, i32* @g5, align 4, !tbaa !5
706 %v0 = load i32, i32* @g5, align 4, !tbaa !5
708 store i32 %v1, i32* @g5, align 4, !tbaa !5
716 %v0 = load i32, i32* @g5, align 4, !tbaa !5
718 store i32 %v1, i32* @g5, align 4, !tbaa !5
726 %v0 = load i32, i32* @g5, align 4, !tbaa !5
[all …]
/external/clang/test/SemaTemplate/
Dcurrent-instantiation.cpp55 void g5(T&); // expected-note{{previous}}
56 void g5(typename X0::U_type&);
57 void g5(typename X0::X1::my_T_type&); // expected-error{{redecl}}
128 void g5(T&); // expected-note{{previous}}
129 void g5(typename X0::U_type&);
130 void g5(typename X0::X2::my_T_type&); // expected-error{{redecl}}
/external/clang/test/CodeGenCXX/
Dmangle-literal-suffix.cpp13 template <class T> void g5(char (&buffer)[sizeof(T() + 5)]) {} in g5() function
14 template void g5<int>(char (&)[sizeof(int)]);
/external/llvm/test/CodeGen/PowerPC/
D2008-07-10-SplatMiscompile.ll1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vadduhm
2 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsubuhm
D2006-08-11-RetVector.ll1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsldoi
2 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep vor
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
D2008-07-10-SplatMiscompile.ll1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vadduhm
2 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsubuhm
D2006-08-11-RetVector.ll1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vsldoi
2 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep vor
Dstfiwx-2.ll2 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep stb
3 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep stfiwx
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
D2008-07-10-SplatMiscompile.ll1 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vadduhm
2 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vsubuhm
D2006-08-11-RetVector.ll1 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vsldoi
2 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | not grep vor
/external/clang/test/SemaCXX/
Dfunction-pointer-arguments.cpp14 int(*g5)(const int, int) = f2; in good() local
31 int (*g5)(int) = f1; in bad() local
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/intrinsics/
Datomicrmw_nand.ll12 @g5 = global i64 0, align 8
48 ; CHECK-DAG: memd(gp+#g5) = [[LOCKED_READ_REG]]
54 store i64 %v1, i64* @g5, align 8
/external/clang/test/Sema/
Dprivate-extern.c19 __private_extern__ int g5; // expected-note{{previous declaration}} variable
20 static int g5; // expected-error{{static declaration of 'g5' follows non-static declaration}} variable
Dalign-x86.c13 unsigned long long g5; variable
14 short chk1[__alignof__(g5) == 8 ? 1 : -1];
/external/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/
Dp5-cxx03-extra-copy.cpp53 void g5(const X5&);
60 g5(X5()); // Generates a warning in the default argument. in test()
/external/swiftshader/third_party/LLVM/test/CodeGen/XCore/
Dscavenging.ll8 @g5 = external global i32 ; <i32*> [#uses=2]
26 %7 = volatile load i32* @g5, align 4 ; <i32> [#uses=1]
41 volatile store i32 %7, i32* @g5, align 4

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