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/external/catch2/projects/SelfTest/IntrospectiveTests/
DGeneratorsImpl.tests.cpp8 auto gen = value(123); variable
9 REQUIRE(gen.get() == 123);
10 REQUIRE_FALSE(gen.next());
13 auto gen = values({ 1, 3, 5 }); variable
14 REQUIRE(gen.get() == 1);
15 REQUIRE(gen.next());
16 REQUIRE(gen.get() == 3);
17 REQUIRE(gen.next());
18 REQUIRE(gen.get() == 5);
19 REQUIRE_FALSE(gen.next());
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/external/syzkaller/pkg/ifuzz/
Dpseudo.go17 gen := makeGen(cfg, r)
19 gen.mov32(regECX, msr)
20 gen.byte(0x0f, 0x32) // rdmsr
21 return gen.text
30 gen := makeGen(cfg, r)
33 gen.mov32(regECX, msr)
34 gen.mov32(regEAX, uint32(v>>0))
35 gen.mov32(regEDX, uint32(v>>32))
36 gen.byte(0x0f, 0x30) // wrmsr
37 return gen.text
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/external/strace/tests-m32/
Dgen_tests.am2gen.test _newselect-P.gen.test accept.gen.test accept4.gen.test access.gen.test acct.gen.test add_…
4 $(srcdir)/_newselect.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
7 $(srcdir)/_newselect-P.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
10 $(srcdir)/accept.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
13 $(srcdir)/accept4.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
16 $(srcdir)/access.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
19 $(srcdir)/acct.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
22 $(srcdir)/add_key.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
25 $(srcdir)/adjtimex.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
28 $(srcdir)/aio.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
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/external/strace/tests/
Dgen_tests.am2gen.test _newselect-P.gen.test accept.gen.test accept4.gen.test access.gen.test acct.gen.test add_…
4 $(srcdir)/_newselect.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
7 $(srcdir)/_newselect-P.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
10 $(srcdir)/accept.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
13 $(srcdir)/accept4.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
16 $(srcdir)/access.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
19 $(srcdir)/acct.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
22 $(srcdir)/add_key.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
25 $(srcdir)/adjtimex.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
28 $(srcdir)/aio.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
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/external/strace/tests-mx32/
Dgen_tests.am2gen.test _newselect-P.gen.test accept.gen.test accept4.gen.test access.gen.test acct.gen.test add_…
4 $(srcdir)/_newselect.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
7 $(srcdir)/_newselect-P.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
10 $(srcdir)/accept.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
13 $(srcdir)/accept4.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
16 $(srcdir)/access.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
19 $(srcdir)/acct.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
22 $(srcdir)/add_key.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
25 $(srcdir)/adjtimex.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
28 $(srcdir)/aio.gen.test: $(abs_srcdir)/gen_tests.sh $(srcdir)/gen_tests.in
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/external/strace/xlat/
DMakemodule.am3 $(top_srcdir)/xlat/access_flags.h: $(top_srcdir)/xlat/access_flags.in $(top_srcdir)/xlat/gen.sh
4 $(AM_V_GEN)$(top_srcdir)/xlat/gen.sh $< $@
5 $(top_srcdir)/xlat/addrfams.h: $(top_srcdir)/xlat/addrfams.in $(top_srcdir)/xlat/gen.sh
6 $(AM_V_GEN)$(top_srcdir)/xlat/gen.sh $< $@
7 $(top_srcdir)/xlat/adjtimex_modes.h: $(top_srcdir)/xlat/adjtimex_modes.in $(top_srcdir)/xlat/gen.sh
8 $(AM_V_GEN)$(top_srcdir)/xlat/gen.sh $< $@
9 $(top_srcdir)/xlat/adjtimex_state.h: $(top_srcdir)/xlat/adjtimex_state.in $(top_srcdir)/xlat/gen.sh
10 $(AM_V_GEN)$(top_srcdir)/xlat/gen.sh $< $@
11 $(top_srcdir)/xlat/adjtimex_status.h: $(top_srcdir)/xlat/adjtimex_status.in $(top_srcdir)/xlat/gen.…
12 $(AM_V_GEN)$(top_srcdir)/xlat/gen.sh $< $@
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/external/python/cpython2/Lib/test/
Dtest_random.py17 return [self.gen.random() for i in xrange(n)]
20 self.gen.seed()
21 state1 = self.gen.getstate()
23 self.gen.seed() # diffent seeds at different times
24 state2 = self.gen.getstate()
29 self.gen.seed()
30 state = self.gen.getstate()
32 self.gen.setstate(state) # should regenerate the same sequence
38 self.gen.seed(arg)
40 self.assertRaises(TypeError, self.gen.seed, arg)
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Dtest_sax.py353 gen = XMLGenerator(result)
354 gen.startDocument()
355 gen.startElement("doc", {})
356 gen.endElement("doc")
357 gen.endDocument()
363 gen = XMLGenerator(result)
365 gen.startDocument()
366 gen.startElement("doc", {})
367 gen.characters("huhei")
368 gen.endElement("doc")
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/external/mesa3d/prebuilt-intermediates/genxml/
DgenX_bits.h59 switch (devinfo->gen) { in _3DPRIMITIVE_length()
100 switch (devinfo->gen) { in _3DPRIMITIVE_3DCommandOpcode_bits()
138 switch (devinfo->gen) { in _3DPRIMITIVE_3DCommandOpcode_start()
179 switch (devinfo->gen) { in _3DPRIMITIVE_3DCommandSubOpcode_bits()
217 switch (devinfo->gen) { in _3DPRIMITIVE_3DCommandSubOpcode_start()
258 switch (devinfo->gen) { in _3DPRIMITIVE_BaseVertexLocation_bits()
296 switch (devinfo->gen) { in _3DPRIMITIVE_BaseVertexLocation_start()
337 switch (devinfo->gen) { in _3DPRIMITIVE_CommandSubType_bits()
375 switch (devinfo->gen) { in _3DPRIMITIVE_CommandSubType_start()
416 switch (devinfo->gen) { in _3DPRIMITIVE_CommandType_bits()
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/external/python/cpython2/Objects/
Dgenobject.c11 gen_traverse(PyGenObject *gen, visitproc visit, void *arg) in gen_traverse() argument
13 Py_VISIT((PyObject *)gen->gi_frame); in gen_traverse()
14 Py_VISIT(gen->gi_code); in gen_traverse()
19 gen_dealloc(PyGenObject *gen) in gen_dealloc() argument
21 PyObject *self = (PyObject *) gen; in gen_dealloc()
23 _PyObject_GC_UNTRACK(gen); in gen_dealloc()
25 if (gen->gi_weakreflist != NULL) in gen_dealloc()
30 if (gen->gi_frame != NULL && gen->gi_frame->f_stacktop != NULL) { in gen_dealloc()
32 Py_TYPE(gen)->tp_del(self); in gen_dealloc()
38 Py_CLEAR(gen->gi_frame); in gen_dealloc()
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/external/boringssl/src/crypto/x509v3/
Dv3_alt.c78 static int do_othername(GENERAL_NAME *gen, char *value, X509V3_CTX *ctx);
79 static int do_dirname(GENERAL_NAME *gen, char *value, X509V3_CTX *ctx);
108 GENERAL_NAME *gen; in STACK_OF() local
110 gen = sk_GENERAL_NAME_value(gens, i); in STACK_OF()
111 ret = i2v_GENERAL_NAME(method, gen, ret); in STACK_OF()
119 GENERAL_NAME *gen, in STACK_OF()
125 switch (gen->type) { in STACK_OF()
142 if (!X509V3_add_value_uchar("email", gen->d.ia5->data, &ret)) in STACK_OF()
147 if (!X509V3_add_value_uchar("DNS", gen->d.ia5->data, &ret)) in STACK_OF()
152 if (!X509V3_add_value_uchar("URI", gen->d.ia5->data, &ret)) in STACK_OF()
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/external/python/cpython3/Lib/test/
Dtest_random.py21 return [self.gen.random() for i in range(n)]
24 self.gen.seed()
25 state1 = self.gen.getstate()
27 self.gen.seed() # different seeds at different times
28 state2 = self.gen.getstate()
33 self.gen.seed()
34 state = self.gen.getstate()
36 self.gen.setstate(state) # should regenerate the same sequence
46 self.gen.seed(arg)
48 self.assertRaises(TypeError, self.gen.seed, arg)
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Dtest_sax.py395 gen = XMLGenerator(result)
396 gen.startDocument()
397 gen.startElement("doc", {})
398 gen.endElement("doc")
399 gen.endDocument()
405 gen = XMLGenerator(result, short_empty_elements=True)
406 gen.startDocument()
407 gen.startElement("doc", {})
408 gen.endElement("doc")
409 gen.endDocument()
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Dtest_generators.py38 gen = self.generator1()
39 gen.send(None)
41 _testcapi.raise_SIGINT_then_send_None(gen)
52 def gen(): function
59 g = gen()
73 def gen(): function
81 g = gen()
105 gen = gen_fun()
106 self.assertEqual(next(gen), 1)
108 gen.send(2)
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/external/jacoco/org.jacoco.core.test/src/org/jacoco/core/runtime/
DRuntimeTestBase.java121 GeneratorAdapter gen = new GeneratorAdapter(writer.visitMethod( in generateAndInstantiateClass() local
124 gen.visitCode(); in generateAndInstantiateClass()
125 gen.loadThis(); in generateAndInstantiateClass()
126 gen.invokeConstructor(Type.getType(Object.class), new Method("<init>", in generateAndInstantiateClass()
128 gen.loadThis(); in generateAndInstantiateClass()
130 gen); in generateAndInstantiateClass()
131 gen.putStatic(classType, InstrSupport.DATAFIELD_NAME, in generateAndInstantiateClass()
133 gen.returnValue(); in generateAndInstantiateClass()
134 gen.visitMaxs(size + 1, 0); in generateAndInstantiateClass()
135 gen.visitEnd(); in generateAndInstantiateClass()
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/external/python/cpython3/Objects/
Dgenobject.c29 gen_traverse(PyGenObject *gen, visitproc visit, void *arg) in gen_traverse() argument
31 Py_VISIT((PyObject *)gen->gi_frame); in gen_traverse()
32 Py_VISIT(gen->gi_code); in gen_traverse()
33 Py_VISIT(gen->gi_name); in gen_traverse()
34 Py_VISIT(gen->gi_qualname); in gen_traverse()
37 return exc_state_traverse(&gen->gi_exc_state, visit, arg); in gen_traverse()
43 PyGenObject *gen = (PyGenObject *)self; in _PyGen_Finalize() local
47 if (gen->gi_frame == NULL || gen->gi_frame->f_stacktop == NULL) { in _PyGen_Finalize()
77 if (gen->gi_code != NULL && in _PyGen_Finalize()
78 ((PyCodeObject *)gen->gi_code)->co_flags & CO_COROUTINE && in _PyGen_Finalize()
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/external/google-breakpad/src/testing/gtest/test/
Dgtest-param-test_test.cc190 const ParamGenerator<int> gen = Range(0, 10); in TEST() local
191 ParamGenerator<int>::iterator it = gen.begin(); in TEST()
225 const ParamGenerator<int> gen = Range(0, 3); in TEST() local
227 VerifyGenerator(gen, expected_values); in TEST()
233 const ParamGenerator<int> gen = Range(0, 1); in TEST() local
235 VerifyGenerator(gen, expected_values); in TEST()
241 const ParamGenerator<int> gen = Range(0, 0); in TEST() local
242 VerifyGeneratorIsEmpty(gen); in TEST()
248 const ParamGenerator<int> gen = Range(0, 9, 3); in TEST() local
250 VerifyGenerator(gen, expected_values); in TEST()
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/external/webrtc/webrtc/modules/video_coding/
Djitter_estimator_tests.cc65 ValueGenerator gen(10); in TEST_F() local
68 regular_estimator_.UpdateEstimate(gen.Delay(), gen.FrameSize()); in TEST_F()
70 low_rate_estimator_.UpdateEstimate(gen.Delay(), gen.FrameSize()); in TEST_F()
75 gen.Advance(); in TEST_F()
82 ValueGenerator gen(10); in TEST_F() local
85 regular_estimator_.UpdateEstimate(gen.Delay(), gen.FrameSize()); in TEST_F()
87 low_rate_estimator_.UpdateEstimate(gen.Delay(), gen.FrameSize()); in TEST_F()
93 gen.Advance(); in TEST_F()
99 ValueGenerator gen(10); in TEST_F() local
102 regular_estimator_.UpdateEstimate(gen.Delay(), gen.FrameSize()); in TEST_F()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/
Datomics-with-scope.ll12 %tmp36 = tail call i32 @llvm.nvvm.atomic.add.gen.i.cta.i32.p0i32(i32* %ip, i32 %i)
14 %tmp38 = tail call i64 @llvm.nvvm.atomic.add.gen.i.cta.i64.p0i64(i64* %llp, i64 %ll)
16 %tmp39 = tail call i32 @llvm.nvvm.atomic.add.gen.i.sys.i32.p0i32(i32* %ip, i32 %i)
18 %tmp41 = tail call i64 @llvm.nvvm.atomic.add.gen.i.sys.i64.p0i64(i64* %llp, i64 %ll)
20 %tmp42 = tail call float @llvm.nvvm.atomic.add.gen.f.cta.f32.p0f32(float* %fp, float %f)
22 %tmp43 = tail call double @llvm.nvvm.atomic.add.gen.f.cta.f64.p0f64(double* %dfp, double %df)
24 %tmp44 = tail call float @llvm.nvvm.atomic.add.gen.f.sys.f32.p0f32(float* %fp, float %f)
26 %tmp45 = tail call double @llvm.nvvm.atomic.add.gen.f.sys.f64.p0f64(double* %dfp, double %df)
29 %tmp46 = tail call i32 @llvm.nvvm.atomic.exch.gen.i.cta.i32.p0i32(i32* %ip, i32 %i)
31 %tmp48 = tail call i64 @llvm.nvvm.atomic.exch.gen.i.cta.i64.p0i64(i64* %llp, i64 %ll)
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/external/mesa3d/src/intel/compiler/
Dbrw_inst.h79 if (devinfo->gen >= 8) { \
81 } else if (devinfo->gen >= 7) { \
83 } else if (devinfo->gen >= 6) { \
85 } else if (devinfo->gen >= 5) { \
177 FC(branch_control, 28, 28, devinfo->gen >= 8)
178 FC(acc_wr_control, 28, 28, devinfo->gen >= 6)
179 FC(mask_control_ex, 28, 28, devinfo->is_g4x || devinfo->gen == 5)
181 FC(math_function, 27, 24, devinfo->gen >= 6)
276 FC(3src_a1_src2_subreg_nr, 117, 113, devinfo->gen >= 10) in REG_TYPE()
277 FC(3src_a1_src2_hstride, 112, 111, devinfo->gen >= 10) in REG_TYPE()
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/external/mesa3d/src/intel/genxml/
Dgen_bits_header.py183 gen = self.tenx
185 if gen % 10 == 0:
186 gen //= 10
191 return 'GEN{}_{}'.format(gen, token)
201 def add_gen(self, gen, xml_attrs): argument
202 assert isinstance(gen, Gen)
204 self.length_by_gen[gen] = xml_attrs['length']
226 def get_prop(self, prop, gen): argument
227 if not isinstance(gen, Gen):
228 gen = Gen(gen)
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/external/googletest/googletest/test/
Dgoogletest-param-test-test.cc137 const ParamGenerator<int> gen = Range(0, 10); in TEST() local
138 ParamGenerator<int>::iterator it = gen.begin(); in TEST()
172 const ParamGenerator<int> gen = Range(0, 3); in TEST() local
174 VerifyGenerator(gen, expected_values); in TEST()
180 const ParamGenerator<int> gen = Range(0, 1); in TEST() local
182 VerifyGenerator(gen, expected_values); in TEST()
188 const ParamGenerator<int> gen = Range(0, 0); in TEST() local
189 VerifyGeneratorIsEmpty(gen); in TEST()
195 const ParamGenerator<int> gen = Range(0, 9, 3); in TEST() local
197 VerifyGenerator(gen, expected_values); in TEST()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DCMakeLists.txt3 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM AMDGPUGenIntrinsicEnums.inc -gen-tgt-intrinsic-enums)
10 tablegen(LLVM AMDGPUGenIntrinsicImpl.inc -gen-tgt-intrinsic-impl)
11 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
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/external/vulkan-headers/registry/
Dreg.py236 self.gen = OutputGenerator()
249 def setGenerator(self, gen): argument
251 self.gen = gen
252 self.gen.setRegistry(self)
273 self.gen.logMsg('warn', 'Attempt to redefine', key,
384 self.gen.logMsg('warn', 'No matching <command> found for command',
441 self.gen.logMsg('warn', 'NO matching group',
492 self.gen.logMsg('warn', 'NO matching group',
558 self.gen.logMsg('diag', 'tagging type:', typename, '-> required =', required)
569 self.gen.logMsg('diag', 'Generating dependent type',
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DCMakeLists.txt3 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
6 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
8 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
9 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
10 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
11 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
12 tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
[all …]

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