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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dcanonicalize-constant-low-bit-mask-and-icmp-ugt-to-icmp-ugt.ll12 declare i8 @gen8()
22 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
26 %x = call i8 @gen8()
34 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
39 %x = call i8 @gen8()
105 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
110 %x = call i8 @gen8()
119 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
122 %x = call i8 @gen8()
147 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
[all …]
Dcanonicalize-constant-low-bit-mask-and-icmp-ule-to-icmp-ule.ll12 declare i8 @gen8()
22 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
26 %x = call i8 @gen8()
34 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
39 %x = call i8 @gen8()
105 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
110 %x = call i8 @gen8()
119 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
122 %x = call i8 @gen8()
147 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
[all …]
Dcanonicalize-constant-low-bit-mask-and-icmp-sgt-to-icmp-sgt.ll14 declare i8 @gen8()
24 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
28 %x = call i8 @gen8()
36 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
41 %x = call i8 @gen8()
96 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
102 %x = call i8 @gen8()
135 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
140 %x = call i8 @gen8()
149 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
[all …]
Dcanonicalize-constant-low-bit-mask-and-icmp-sle-to-icmp-sle.ll14 declare i8 @gen8()
24 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
28 %x = call i8 @gen8()
36 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
41 %x = call i8 @gen8()
96 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
102 %x = call i8 @gen8()
135 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
140 %x = call i8 @gen8()
149 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
[all …]
Dcanonicalize-constant-low-bit-mask-and-icmp-uge-to-icmp-ule.ll76 declare i8 @gen8()
81 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
84 %x = call i8 @gen8()
96 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
101 %x = call i8 @gen8()
110 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
113 %x = call i8 @gen8()
122 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
125 %x = call i8 @gen8()
Dcanonicalize-constant-low-bit-mask-and-icmp-eq-to-icmp-ule.ll76 declare i8 @gen8()
80 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
84 %x = call i8 @gen8()
96 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
101 %x = call i8 @gen8()
110 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
115 %x = call i8 @gen8()
124 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
129 %x = call i8 @gen8()
Dcanonicalize-constant-low-bit-mask-and-icmp-ult-to-icmp-ugt.ll76 declare i8 @gen8()
81 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
84 %x = call i8 @gen8()
96 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
101 %x = call i8 @gen8()
110 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
113 %x = call i8 @gen8()
122 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
125 %x = call i8 @gen8()
Dcanonicalize-constant-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll76 declare i8 @gen8()
80 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
84 %x = call i8 @gen8()
96 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
101 %x = call i8 @gen8()
110 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
115 %x = call i8 @gen8()
124 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
129 %x = call i8 @gen8()
Dcanonicalize-constant-low-bit-mask-and-icmp-slt-to-icmp-sgt.ll87 declare i8 @gen8()
91 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
96 %x = call i8 @gen8()
109 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
115 %x = call i8 @gen8()
124 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
130 %x = call i8 @gen8()
139 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
145 %x = call i8 @gen8()
Dcanonicalize-constant-low-bit-mask-and-icmp-sge-to-icmp-sle.ll87 declare i8 @gen8()
91 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
96 %x = call i8 @gen8()
109 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
115 %x = call i8 @gen8()
124 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
130 %x = call i8 @gen8()
139 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
145 %x = call i8 @gen8()
Dcanonicalize-low-bit-mask-and-icmp-eq-to-icmp-ule.ll59 declare i8 @gen8()
64 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
69 %x = call i8 @gen8()
78 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
83 %x = call i8 @gen8()
92 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
97 %x = call i8 @gen8()
Dcanonicalize-low-bit-mask-and-icmp-ne-to-icmp-ugt.ll59 declare i8 @gen8()
64 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
69 %x = call i8 @gen8()
78 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
83 %x = call i8 @gen8()
92 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
97 %x = call i8 @gen8()
Dcanonicalize-signed-truncation-check.ll113 declare i8 @gen8()
117 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
122 %x = call i8 @gen8()
Dcanonicalize-lack-of-signed-truncation-check.ll113 declare i8 @gen8()
117 ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8()
122 %x = call i8 @gen8()
/external/skqp/src/compute/hs/cl/bench/
DMakefile9 ../intel/gen8/u32/hs_intel_gen8_u32.c \
10 ../intel/gen8/u64/hs_intel_gen8_u64.c \
/external/skia/src/compute/hs/cl/bench/
DMakefile9 ../intel/gen8/u32/hs_intel_gen8_u32.c \
10 ../intel/gen8/u64/hs_intel_gen8_u64.c \
/external/skia/src/compute/hs/vk/bench/
Dmake_bench.bat13 ../intel/gen8/u32/hs_intel_gen8_u32.c ^
14 ../intel/gen8/u64/hs_intel_gen8_u64.c ^
DMakefile10 ../intel/gen8/u32/hs_intel_gen8_u32.c \
11 ../intel/gen8/u64/hs_intel_gen8_u64.c \
/external/skqp/src/compute/hs/vk/bench/
Dmake_bench.bat13 ../intel/gen8/u32/hs_intel_gen8_u32.c ^
14 ../intel/gen8/u64/hs_intel_gen8_u64.c ^
DMakefile10 ../intel/gen8/u32/hs_intel_gen8_u32.c \
11 ../intel/gen8/u64/hs_intel_gen8_u64.c \
/external/mesa3d/src/intel/vulkan/
DTODO9 - Multi-{sampled/gen8,LOD} HiZ
Dgen8_cmd_buffer.c405 anv_batch_emit_merge(&cmd_buffer->batch, sf_dw, pipeline->gen8.sf); in genX()
419 pipeline->gen8.raster); in genX()
475 pipeline->gen8.wm_depth_stencil); in genX()
/external/mesa3d/src/intel/
DAndroid.genxml.mk88 $(intermediates)/genxml/gen8_pack.h: PRIVATE_XML := $(LOCAL_PATH)/genxml/gen8.xml
89 $(intermediates)/genxml/gen8_pack.h: $(LOCAL_PATH)/genxml/gen8.xml $(LOCAL_PATH)/genxml/gen_pack_he…
/external/mesa3d/docs/
Dfeatures.txt165 GL 4.3, GLSL 4.30 -- all DONE: i965/gen8+, nvc0, r600, radeonsi
191 GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, radeonsi
299 GL_ARB_ES3_2_compatibility DONE (i965/gen8+)
301 …GL_ARB_gpu_shader_int64 DONE (i965/gen8+, nvc0, radeonsi, softpipe, …
307 GL_ARB_shader_ballot DONE (i965/gen8+, nvc0, radeonsi)
/external/mesa3d/src/intel/genxml/
Dmeson.build28 'gen8.xml',

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