Searched refs:getBaseReg (Results 1 – 7 of 7) sorted by relevance
347 static RegNumT getBaseReg(RegNumT RegNum) { in getBaseReg() function408 getBaseReg(RegisterSet::val) == RegisterSet::Reg_esp); \ in getGprForType()417 assert(getBaseReg(RegNum) == getBaseReg(NewRegNum) && \ in getGprForType()
372 static inline RegNumT getBaseReg(RegNumT RegNum) { in getBaseReg() function434 getBaseReg(RegisterSet::val) == RegisterSet::Reg_rsp); \ in getGprForType()445 assert(getBaseReg(RegNum) == getBaseReg(NewRegNum) && \ in getGprForType()
1086 const auto Canonical = Traits::getBaseReg(i);1087 assert(Canonical == Traits::getBaseReg(Canonical));1093 assert(RegNum == Traits::getBaseReg(RegNum));1352 const RegNumT Canonical = Traits::getBaseReg(RegNum);1361 assert(RegNum == Traits::getBaseReg(RegNum));
2775 const auto NewRegNum = Traits::getBaseReg(Src1Var->getRegNum()); in emit()2803 const auto BaseRegNum = Traits::getBaseReg(RegNum); in emitIAS()
1104 (Traits::getBaseReg(SrcReg) == Traits::getBaseReg(DestReg)); in isRedundantAssign()
355 unsigned getBaseReg() { return BaseReg; } in getBaseReg() function in __anon3ca5b30f0111::X86AsmParser::IntelExprStateMachine1578 if (!(SM.getBaseReg() || SM.getIndexReg() || SM.getImm())) { in RewriteIntelExpression()1587 if (SM.getBaseReg()) in RewriteIntelExpression()1588 BaseRegStr = X86IntelInstPrinter::getRegisterName(SM.getBaseReg()); in RewriteIntelExpression()1887 unsigned BaseReg = SM.getBaseReg(); in ParseIntelOperand()
278 unsigned getBaseReg() { return BaseReg; } in getBaseReg() function in __anonf33d2cb70111::X86AsmParser::IntelExprStateMachine1439 int BaseReg = SM.getBaseReg(); in ParseIntelBracExpression()1644 if (SM.getBaseReg()) { in ParseIntelMemOperand()