| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUSubtarget.h | 710 return AMDGPU::IsaInfo::getEUsPerCU(MCSubtargetInfo::getFeatureBits()); in getEUsPerCU()
716 return AMDGPU::IsaInfo::getMaxWavesPerCU(MCSubtargetInfo::getFeatureBits()); in getMaxWavesPerCU()
722 return AMDGPU::IsaInfo::getMaxWavesPerCU(MCSubtargetInfo::getFeatureBits(), in getMaxWavesPerCU()
736 MCSubtargetInfo::getFeatureBits(), FlatWorkGroupSize); in getWavesPerWorkGroup()
855 MCSubtargetInfo::getFeatureBits()); in getSGPRAllocGranule()
861 MCSubtargetInfo::getFeatureBits()); in getSGPREncodingGranule()
866 return AMDGPU::IsaInfo::getTotalNumSGPRs(MCSubtargetInfo::getFeatureBits()); in getTotalNumSGPRs()
872 MCSubtargetInfo::getFeatureBits()); in getAddressableNumSGPRs()
878 return AMDGPU::IsaInfo::getMinNumSGPRs(MCSubtargetInfo::getFeatureBits(), in getMinNumSGPRs()
885 return AMDGPU::IsaInfo::getMaxNumSGPRs(MCSubtargetInfo::getFeatureBits(), in getMaxNumSGPRs()
[all …]
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| D | AMDGPUAsmPrinter.cpp | 138 IsaInfo::IsaVersion ISA = IsaInfo::getIsaVersion(getSTI()->getFeatureBits()); in EmitStartOfAsmFile()
244 IsaInfo::getNumExtraSGPRs(getSTI()->getFeatureBits(), in EmitFunctionBodyEnd()
565 return NumExplicitSGPR + IsaInfo::getNumExtraSGPRs(ST.getFeatureBits(), in getTotalNumSGPRs()
762 47 - IsaInfo::getNumExtraSGPRs(ST.getFeatureBits(), true, in analyzeResourceUsage()
827 STM.getFeatureBits(), ProgInfo.VCCUsed, ProgInfo.FlatUsed); in getSIProgramInfo()
909 STM.getFeatureBits(), ProgInfo.NumSGPRsForWavesPerEU); in getSIProgramInfo()
911 STM.getFeatureBits(), ProgInfo.NumVGPRsForWavesPerEU); in getSIProgramInfo()
1141 AMDGPU::initDefaultAMDKernelCodeT(Out, STM.getFeatureBits()); in getAmdKernelCode()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmWriter.inc | 13308 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13354 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13365 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13374 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13383 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13466 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13476 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13490 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13500 STI.getFeatureBits()[AArch64::FeatureSVE]) {
13514 STI.getFeatureBits()[AArch64::FeatureSVE]) {
[all …]
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| D | AArch64GenAsmWriter1.inc | 13996 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14042 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14053 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14062 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14071 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14154 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14164 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14178 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14188 STI.getFeatureBits()[AArch64::FeatureSVE]) {
14202 STI.getFeatureBits()[AArch64::FeatureSVE]) {
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Disassembler/ |
| D | AMDGPUDisassembler.cpp | 180 if (!STI.getFeatureBits()[AMDGPU::FeatureGCN3Encoding]) in getInstruction()
204 if (STI.getFeatureBits()[AMDGPU::FeatureUnpackedD16VMem]) { in getInstruction()
213 if (STI.getFeatureBits()[AMDGPU::FeatureFmaMixInsts]) { in getInstruction()
270 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9]) { in convertSDWAInst()
274 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) { in convertSDWAInst()
810 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9]) { in decodeSDWASrc()
838 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) { in decodeSDWASrc()
855 assert(STI.getFeatureBits()[AMDGPU::FeatureGFX9] && in decodeSDWAVopcDst()
874 return STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]; in isVI()
878 return STI.getFeatureBits()[AMDGPU::FeatureGFX9]; in isGFX9()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Utils/ |
| D | AMDGPUBaseInfo.cpp | 192 auto ISAVersion = IsaInfo::getIsaVersion(STI->getFeatureBits()); in streamIsaVersion()
210 return STI->getFeatureBits().test(FeatureCodeObjectV3); in hasCodeObjectV3()
643 return STI.getFeatureBits()[AMDGPU::FeatureXNACK]; in hasXNACK()
647 return STI.getFeatureBits()[AMDGPU::FeatureMIMG_R128]; in hasMIMG_R128()
651 return !STI.getFeatureBits()[AMDGPU::FeatureUnpackedD16VMem]; in hasPackedD16()
655 return STI.getFeatureBits()[AMDGPU::FeatureSouthernIslands]; in isSI()
659 return STI.getFeatureBits()[AMDGPU::FeatureSeaIslands]; in isCI()
663 return STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]; in isVI()
667 return STI.getFeatureBits()[AMDGPU::FeatureGFX9]; in isGFX9()
671 return STI.getFeatureBits()[AMDGPU::FeatureGCN3Encoding]; in isGCN3Encoding()
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| /external/llvm/lib/Target/AMDGPU/Utils/ |
| D | AMDGPUBaseInfo.cpp | 152 return STI.getFeatureBits()[AMDGPU::FeatureSouthernIslands]; in isSI()
156 return STI.getFeatureBits()[AMDGPU::FeatureSeaIslands]; in isCI()
160 return STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]; in isVI()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | R600MCCodeEmitter.cpp | 103 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
115 if (!(STI.getFeatureBits()[R600::FeatureCaymanISA])) { in encodeInstruction()
148 if ((STI.getFeatureBits()[R600::FeatureR600ALUInst]) && in encodeInstruction()
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| D | SIMCCodeEmitter.cpp | 133 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit16Encoding()
169 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit32Encoding()
205 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit64Encoding()
267 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCTargetDesc.cpp | 36 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
68 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
80 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMStoreDeprecationInfo()
97 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMLoadDeprecationInfo()
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| D | ARMAsmBackend.cpp | 175 bool HasThumb2 = STI->getFeatureBits()[ARM::FeatureThumb2]; in getRelaxedOpcode()
176 bool HasV8MBaselineOps = STI->getFeatureBits()[ARM::HasV8MBaselineOps]; in getRelaxedOpcode()
571 if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) { in adjustFixupValue()
588 if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
589 !STI->getFeatureBits()[ARM::HasV8MBaselineOps]) { in adjustFixupValue()
599 if (Ctx && !STI->getFeatureBits()[ARM::FeatureThumb2]) { in adjustFixupValue()
|
| /external/swiftshader/third_party/LLVM/lib/MC/ |
| D | MCSubtargetInfo.cpp | 40 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs, in InitMCSubtargetInfo()
49 FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs, in ReInitMCSubtargetInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAsmBackend.cpp | 178 bool HasThumb2 = STI.getFeatureBits()[ARM::FeatureThumb2]; in getRelaxedOpcode()
179 bool HasV8MBaselineOps = STI.getFeatureBits()[ARM::HasV8MBaselineOps]; in getRelaxedOpcode()
537 (!STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
538 !STI->getFeatureBits()[ARM::HasV8MBaselineOps] && in adjustFixupValue()
539 !STI->getFeatureBits()[ARM::HasV6MOps] && in adjustFixupValue()
612 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) { in adjustFixupValue()
637 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
638 !STI->getFeatureBits()[ARM::HasV8MBaselineOps]) { in adjustFixupValue()
649 if (!STI->getFeatureBits()[ARM::FeatureThumb2]) { in adjustFixupValue()
|
| D | ARMMCTargetDesc.cpp | 39 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
71 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
83 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMStoreDeprecationInfo()
100 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMLoadDeprecationInfo()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/X86/ |
| D | Target.cpp | 128 if (STI.getFeatureBits()[llvm::X86::FeatureAVX512]) in setRegToConstant()
130 if (STI.getFeatureBits()[llvm::X86::FeatureAVX]) in setRegToConstant()
135 if (STI.getFeatureBits()[llvm::X86::FeatureAVX512]) in setRegToConstant()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCTargetDesc.cpp | 265 uint64_t FB = STI->getFeatureBits().to_ullong(); in clearFeature()
271 uint64_t FB = STI->getFeatureBits().to_ullong(); in checkFeature()
395 llvm::FeatureBitset Features = X->getFeatureBits(); in createHexagonMCSubtargetInfo()
399 X->setFeatureBits(completeHVXFeatures(X->getFeatureBits())); in createHexagonMCSubtargetInfo()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVAsmBackend.cpp | 43 return STI.getFeatureBits()[RISCV::FeatureRelax]; in requiresDiffExpressionRelocations()
58 return STI.getFeatureBits()[RISCV::FeatureRelax]; in shouldForceRelocation()
205 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; in writeNopData()
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| D | RISCVELFStreamer.cpp | 27 const FeatureBitset &Features = STI.getFeatureBits(); in RISCVTargetELFStreamer()
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 357 FeatureBitset FeatureBits = STI.getFeatureBits(); in selectArch()
362 AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); in selectArch()
366 if (!(getSTI().getFeatureBits()[Feature])) { in setFeatureBits()
370 AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); in setFeatureBits()
375 if (getSTI().getFeatureBits()[Feature]) { in clearFeatureBits()
379 AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); in clearFeatureBits()
385 AssemblerOptions.front()->setFeatures(getSTI().getFeatureBits()); in setModuleFeatureBits()
390 AssemblerOptions.front()->setFeatures(getSTI().getFeatureBits()); in clearModuleFeatureBits()
413 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in MipsAsmParser()
417 llvm::make_unique<MipsAssemblerOptions>(getSTI().getFeatureBits())); in MipsAsmParser()
[all …]
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| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | R600MCCodeEmitter.cpp | 99 if (!(STI.getFeatureBits()[AMDGPU::FeatureCaymanISA])) { in encodeInstruction()
132 if ((STI.getFeatureBits()[AMDGPU::FeatureR600ALUInst]) && in encodeInstruction()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/ |
| D | X86ATTInstPrinter.cpp | 57 (STI.getFeatureBits()[X86::Mode64Bit])) { in printInst()
67 STI.getFeatureBits()[X86::Mode16Bit]) { in printInst()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86AsmBackend.cpp | 303 bool is16BitMode = STI.getFeatureBits()[X86::Mode16Bit]; in relaxInstruction()
347 if (!STI.getFeatureBits()[X86::FeatureNOPL]) { in writeNopData()
356 if (STI.getFeatureBits()[X86::ProcIntelSLM]) in writeNopData()
358 else if (STI.getFeatureBits()[X86::FeatureFast15ByteNOP]) in writeNopData()
360 else if (STI.getFeatureBits()[X86::FeatureFast11ByteNOP]) in writeNopData()
|
| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCSubtargetInfo.h | 56 uint64_t getFeatureBits() const { in getFeatureBits() function
|
| D | SubtargetFeature.h | 92 uint64_t getFeatureBits(const StringRef CPU,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 428 FeatureBitset FeatureBits = STI.getFeatureBits(); in selectArch()
433 AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); in selectArch()
437 if (!(getSTI().getFeatureBits()[Feature])) { in setFeatureBits()
441 AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); in setFeatureBits()
446 if (getSTI().getFeatureBits()[Feature]) { in clearFeatureBits()
450 AssemblerOptions.back()->setFeatures(STI.getFeatureBits()); in clearFeatureBits()
456 AssemblerOptions.front()->setFeatures(getSTI().getFeatureBits()); in setModuleFeatureBits()
461 AssemblerOptions.front()->setFeatures(getSTI().getFeatureBits()); in clearModuleFeatureBits()
494 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in MipsAsmParser()
498 llvm::make_unique<MipsAssemblerOptions>(getSTI().getFeatureBits())); in MipsAsmParser()
[all …]
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