Searched refs:getMaxNumSGPRs (Results 1 – 7 of 7) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUSubtarget.cpp | 546 unsigned GCNSubtarget::getMaxNumSGPRs(const MachineFunction &MF) const { in getMaxNumSGPRs() function in GCNSubtarget 553 unsigned MaxNumSGPRs = getMaxNumSGPRs(WavesPerEU.first, false); in getMaxNumSGPRs() 554 unsigned MaxAddressableNumSGPRs = getMaxNumSGPRs(WavesPerEU.first, true); in getMaxNumSGPRs() 579 if (Requested && Requested > getMaxNumSGPRs(WavesPerEU.first, false)) in getMaxNumSGPRs()
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D | AMDGPUSubtarget.h | 884 unsigned getMaxNumSGPRs(unsigned WavesPerEU, bool Addressable) const { in getMaxNumSGPRs() function 885 return AMDGPU::IsaInfo::getMaxNumSGPRs(MCSubtargetInfo::getFeatureBits(), in getMaxNumSGPRs() 900 unsigned getMaxNumSGPRs(const MachineFunction &MF) const;
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D | SIRegisterInfo.cpp | 110 unsigned BaseIdx = alignDown(ST.getMaxNumSGPRs(MF), 4) - 4; in reservedPrivateSegmentBufferReg() 135 unsigned Reg = findPrivateSegmentWaveByteOffsetRegIndex(ST.getMaxNumSGPRs(MF)); in reservedPrivateSegmentWaveByteOffsetReg() 178 unsigned MaxNumSGPRs = ST.getMaxNumSGPRs(MF); in getReservedRegs() 1546 return std::min(ST.getMaxNumSGPRs(Occupancy, true), ST.getMaxNumSGPRs(MF)); in getRegPressureLimit()
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D | SIFrameLowering.cpp | 29 ST.getMaxNumSGPRs(MF) / 4); in getAllSGPR128() 35 ST.getMaxNumSGPRs(MF)); in getAllSGPRs()
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D | GCNSchedStrategy.cpp | 49 SGPRCriticalLimit = ST.getMaxNumSGPRs(TargetOccupancy, true); in initialize()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Utils/ |
D | AMDGPUBaseInfo.h | 140 unsigned getMaxNumSGPRs(const FeatureBitset &Features, unsigned WavesPerEU,
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D | AMDGPUBaseInfo.cpp | 325 unsigned getMaxNumSGPRs(const FeatureBitset &Features, unsigned WavesPerEU, in getMaxNumSGPRs() function
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