/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIPeepholeSDWA.cpp | 337 if (TII->getNamedOperand(*MI, AMDGPU::OpName::src0) == SrcOp) { in getSrcMods() 338 if (auto *Mod = TII->getNamedOperand(*MI, AMDGPU::OpName::src0_modifiers)) { in getSrcMods() 341 } else if (TII->getNamedOperand(*MI, AMDGPU::OpName::src1) == SrcOp) { in getSrcMods() 342 if (auto *Mod = TII->getNamedOperand(*MI, AMDGPU::OpName::src1_modifiers)) { in getSrcMods() 372 MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in convertToSDWA() 373 MachineOperand *SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src0_sel); in convertToSDWA() 375 TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers); in convertToSDWA() 379 Src = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in convertToSDWA() 380 SrcSel = TII->getNamedOperand(MI, AMDGPU::OpName::src1_sel); in convertToSDWA() 381 SrcMods = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers); in convertToSDWA() [all …]
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D | SILoadStoreOptimizer.cpp | 436 CI.GLC0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::glc)->getImm(); in findMatchingInst() 437 CI.GLC1 = TII->getNamedOperand(*MBBI, AMDGPU::OpName::glc)->getImm(); in findMatchingInst() 439 CI.SLC0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::slc)->getImm(); in findMatchingInst() 440 CI.SLC1 = TII->getNamedOperand(*MBBI, AMDGPU::OpName::slc)->getImm(); in findMatchingInst() 485 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeRead2Pair() 487 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdst); in mergeRead2Pair() 488 const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdst); in mergeRead2Pair() 581 const MachineOperand *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeWrite2Pair() 582 const MachineOperand *Data0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::data0); in mergeWrite2Pair() 584 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::data0); in mergeWrite2Pair() [all …]
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D | SIShrinkInstructions.cpp | 71 const MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2); in canShrink() 86 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in canShrink() 105 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in canShrink() 451 TII->getNamedOperand(MI, AMDGPU::OpName::src2); in runOnMachineFunction() 464 const MachineOperand *SDst = TII->getNamedOperand(MI, in runOnMachineFunction() 468 const MachineOperand *Src2 = TII->getNamedOperand(MI, in runOnMachineFunction() 506 Inst32.add(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)); in runOnMachineFunction() 509 TII->getNamedOperand(MI, AMDGPU::OpName::src1); in runOnMachineFunction()
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D | SIInstrInfo.cpp | 274 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs() 278 getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs() 289 getNamedOperand(LdSt, AMDGPU::OpName::offset0); in getMemOpBaseRegImmOfs() 291 getNamedOperand(LdSt, AMDGPU::OpName::offset1); in getMemOpBaseRegImmOfs() 313 getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs() 323 const MachineOperand *SOffset = getNamedOperand(LdSt, AMDGPU::OpName::soffset); in getMemOpBaseRegImmOfs() 328 getNamedOperand(LdSt, AMDGPU::OpName::vaddr); in getMemOpBaseRegImmOfs() 333 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs() 345 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs() 350 getNamedOperand(LdSt, AMDGPU::OpName::sbase); in getMemOpBaseRegImmOfs() [all …]
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D | SIFoldOperands.cpp | 638 const MachineOperand *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0); in tryFoldInst() 639 const MachineOperand *Src1 = TII->getNamedOperand(*MI, AMDGPU::OpName::src1); in tryFoldInst() 776 if (!TII->getNamedOperand(MI, AMDGPU::OpName::clamp)->getImm()) in isClamp() 780 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isClamp() 781 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isClamp() 793 = TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers)->getImm(); in isClamp() 795 = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers)->getImm(); in isClamp() 834 MachineOperand *DefClamp = TII->getNamedOperand(*Def, AMDGPU::OpName::clamp); in tryFoldClamp() 895 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isOMod() 896 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod() [all …]
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D | SIRegisterInfo.cpp | 356 MachineOperand *FIOp = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr); in resolveFrameIndex() 359 assert(TII->getNamedOperand(MI, AMDGPU::OpName::soffset)->getReg() == in resolveFrameIndex() 364 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() 497 const MachineOperand *Reg = TII->getNamedOperand(*MI, AMDGPU::OpName::vdata); in buildMUBUFOffsetLoadStore() 500 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)) in buildMUBUFOffsetLoadStore() 501 .add(*TII->getNamedOperand(*MI, AMDGPU::OpName::soffset)) in buildMUBUFOffsetLoadStore() 508 const MachineOperand *VDataIn = TII->getNamedOperand(*MI, in buildMUBUFOffsetLoadStore() 1028 const MachineOperand *VData = TII->getNamedOperand(*MI, in eliminateFrameIndex() 1033 TII->getNamedOperand(*MI, AMDGPU::OpName::srsrc)->getReg(), in eliminateFrameIndex() 1034 TII->getNamedOperand(*MI, AMDGPU::OpName::soffset)->getReg(), in eliminateFrameIndex() [all …]
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D | AMDGPUMacroFusion.cpp | 45 const MachineOperand *Src2 = TII.getNamedOperand(SecondMI, in shouldScheduleAdjacent()
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D | SIOptimizeExecMaskingPreRA.cpp | 85 auto Op = TII.getNamedOperand(MI, AMDGPU::OpName::src1); in getOrNonExecReg() 88 Op = TII.getNamedOperand(MI, AMDGPU::OpName::src0); in getOrNonExecReg()
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D | GCNHazardRecognizer.cpp | 104 const MachineOperand *RegOp = TII->getNamedOperand(RegInstr, in getHWReg() 507 TII->getNamedOperand(MI, AMDGPU::OpName::soffset); in createsVALUHazard() 607 TII->getNamedOperand(*RWLane, AMDGPU::OpName::src1); in checkRWLaneHazards()
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D | SIInstrInfo.h | 803 MachineOperand *getNamedOperand(MachineInstr &MI, unsigned OperandName) const; 806 const MachineOperand *getNamedOperand(const MachineInstr &MI, in getNamedOperand() function 808 return getNamedOperand(const_cast<MachineInstr &>(MI), OpName); in getNamedOperand()
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D | SIFixSGPRCopies.cpp | 364 TII->getNamedOperand(*MoveImm, AMDGPU::OpName::src0); in isSafeToFoldImmIntoCopy()
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D | SIFrameLowering.cpp | 695 int FI = TII->getNamedOperand(MI, AMDGPU::OpName::addr)->getIndex(); in processFunctionBeforeFrameFinalized()
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D | SIInsertWaitcnts.cpp | 650 MachineOperand *MO = TII->getNamedOperand(Inst, AMDGPU::OpName::data); in updateByEvent() 1363 int Imm = TII->getNamedOperand(Inst, AMDGPU::OpName::tgt)->getImm(); in updateEventWaitcntAfter()
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D | AMDGPUAsmPrinter.cpp | 754 = TII->getNamedOperand(MI, AMDGPU::OpName::callee); in analyzeResourceUsage()
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D | SIISelLowering.cpp | 2951 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in loadM0FromVGPR() 2991 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in setM0ToIndexFromSGPR() 3047 unsigned SrcReg = TII->getNamedOperand(MI, AMDGPU::OpName::src)->getReg(); in emitIndirectSrc() 3048 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm(); in emitIndirectSrc() 3138 const MachineOperand *SrcVec = TII->getNamedOperand(MI, AMDGPU::OpName::src); in emitIndirectDst() 3139 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in emitIndirectDst() 3140 const MachineOperand *Val = TII->getNamedOperand(MI, AMDGPU::OpName::val); in emitIndirectDst() 3141 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm(); in emitIndirectDst()
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/external/llvm/lib/Target/AMDGPU/ |
D | SILoadStoreOptimizer.cpp | 200 const MachineOperand *AddrReg = TII->getNamedOperand(*I, AMDGPU::OpName::addr); in mergeRead2Pair() 202 const MachineOperand *Dest0 = TII->getNamedOperand(*I, AMDGPU::OpName::vdst); in mergeRead2Pair() 203 const MachineOperand *Dest1 = TII->getNamedOperand(*Paired, AMDGPU::OpName::vdst); in mergeRead2Pair() 206 = TII->getNamedOperand(*I, AMDGPU::OpName::offset)->getImm() & 0xffff; in mergeRead2Pair() 208 = TII->getNamedOperand(*Paired, AMDGPU::OpName::offset)->getImm() & 0xffff; in mergeRead2Pair() 295 const MachineOperand *Addr = TII->getNamedOperand(*I, AMDGPU::OpName::addr); in mergeWrite2Pair() 296 const MachineOperand *Data0 = TII->getNamedOperand(*I, AMDGPU::OpName::data0); in mergeWrite2Pair() 298 = TII->getNamedOperand(*Paired, AMDGPU::OpName::data0); in mergeWrite2Pair() 302 = TII->getNamedOperand(*I, AMDGPU::OpName::offset)->getImm() & 0xffff; in mergeWrite2Pair() 304 = TII->getNamedOperand(*Paired, AMDGPU::OpName::offset)->getImm() & 0xffff; in mergeWrite2Pair()
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D | SIShrinkInstructions.cpp | 84 const MachineOperand *Src2 = TII->getNamedOperand(MI, AMDGPU::OpName::src2); in canShrink() 106 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in canShrink() 108 TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers); in canShrink() 349 TII->getNamedOperand(MI, AMDGPU::OpName::src2); in runOnMachineFunction() 379 Inst32.addOperand(*TII->getNamedOperand(MI, AMDGPU::OpName::src0)); in runOnMachineFunction() 382 TII->getNamedOperand(MI, AMDGPU::OpName::src1); in runOnMachineFunction() 387 TII->getNamedOperand(MI, AMDGPU::OpName::src2); in runOnMachineFunction()
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D | SIInstrInfo.cpp | 212 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs() 216 getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs() 227 getNamedOperand(LdSt, AMDGPU::OpName::offset0); in getMemOpBaseRegImmOfs() 229 getNamedOperand(LdSt, AMDGPU::OpName::offset1); in getMemOpBaseRegImmOfs() 251 getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs() 265 getNamedOperand(LdSt, AMDGPU::OpName::vaddr); in getMemOpBaseRegImmOfs() 270 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs() 278 getNamedOperand(LdSt, AMDGPU::OpName::offset); in getMemOpBaseRegImmOfs() 283 getNamedOperand(LdSt, AMDGPU::OpName::sbase); in getMemOpBaseRegImmOfs() 290 const MachineOperand *AddrReg = getNamedOperand(LdSt, AMDGPU::OpName::addr); in getMemOpBaseRegImmOfs() [all …]
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D | SIRegisterInfo.cpp | 324 MachineOperand *FIOp = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr); in resolveFrameIndex() 329 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() 640 TII->getNamedOperand(*MI, AMDGPU::OpName::src), in eliminateFrameIndex() 641 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_rsrc)->getReg(), in eliminateFrameIndex() 642 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_offset)->getReg(), in eliminateFrameIndex() 644 TII->getNamedOperand(*MI, AMDGPU::OpName::offset)->getImm(), RS); in eliminateFrameIndex() 655 TII->getNamedOperand(*MI, AMDGPU::OpName::dst), in eliminateFrameIndex() 656 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_rsrc)->getReg(), in eliminateFrameIndex() 657 TII->getNamedOperand(*MI, AMDGPU::OpName::scratch_offset)->getReg(), in eliminateFrameIndex() 659 TII->getNamedOperand(*MI, AMDGPU::OpName::offset)->getImm(), RS); in eliminateFrameIndex()
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D | SILowerControlFlow.cpp | 423 if (const MachineOperand *Val = TII->getNamedOperand(MI, AMDGPU::OpName::val)) { in splitLoadM0BlockLiveIns() 435 const MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::src); in splitLoadM0BlockLiveIns() 531 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in loadM0() 548 MachineOperand *SaveOp = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in loadM0() 633 const MachineOperand *SrcVec = TII->getNamedOperand(MI, AMDGPU::OpName::src); in indirectSrc() 634 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm(); in indirectSrc() 639 const MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in indirectSrc() 662 int Offset = TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm(); in indirectDst() 665 const MachineOperand *Val = TII->getNamedOperand(MI, AMDGPU::OpName::val); in indirectDst() 668 MachineOperand *Idx = TII->getNamedOperand(MI, AMDGPU::OpName::idx); in indirectDst()
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D | SIInsertWaits.cpp | 249 MachineOperand *Data = TII->getNamedOperand(MI, AMDGPU::OpName::data); in isOpRelevant() 255 MachineOperand *Data0 = TII->getNamedOperand(MI, AMDGPU::OpName::data0); in isOpRelevant() 259 MachineOperand *Data1 = TII->getNamedOperand(MI, AMDGPU::OpName::data1); in isOpRelevant()
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D | SIInstrInfo.h | 504 MachineOperand *getNamedOperand(MachineInstr &MI, unsigned OperandName) const; 507 const MachineOperand *getNamedOperand(const MachineInstr &MI, in getNamedOperand() function 509 return getNamedOperand(const_cast<MachineInstr &>(MI), OpName); in getNamedOperand()
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/external/clang/lib/AST/ |
D | Stmt.cpp | 455 int GCCAsmStmt::getNamedOperand(StringRef SymbolicName) const { in getNamedOperand() function in GCCAsmStmt 619 int N = getNamedOperand(SymbolicName); in AnalyzeAsmString()
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/external/clang/include/clang/AST/ |
D | Stmt.h | 1726 int getNamedOperand(StringRef SymbolicName) const;
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