| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.h | 262 unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo,
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| D | MipsMCCodeEmitter.cpp | 1036 MipsMCCodeEmitter::getRegisterListOpValue(const MCInst &MI, unsigned OpNo, in getRegisterListOpValue() function in MipsMCCodeEmitter
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.h | 259 unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo,
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| D | MipsMCCodeEmitter.cpp | 1062 MipsMCCodeEmitter::getRegisterListOpValue(const MCInst &MI, unsigned OpNo, in getRegisterListOpValue() function in MipsMCCodeEmitter
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 286 unsigned getRegisterListOpValue(const MCInst &MI, unsigned Op,
1306 getRegisterListOpValue(const MCInst &MI, unsigned Op, in getRegisterListOpValue() function in ARMMCCodeEmitter
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 389 unsigned getRegisterListOpValue(const MCInst &MI, unsigned Op,
1534 getRegisterListOpValue(const MCInst &MI, unsigned Op, in getRegisterListOpValue() function in ARMMCCodeEmitter
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 366 unsigned getRegisterListOpValue(const MCInst &MI, unsigned Op,
1523 getRegisterListOpValue(const MCInst &MI, unsigned Op, in getRegisterListOpValue() function in ARMMCCodeEmitter
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenMCCodeEmitter.inc | 4228 op = getRegisterListOpValue(MI, 3, Fixups, STI);
4239 op = getRegisterListOpValue(MI, 3, Fixups, STI);
4257 op = getRegisterListOpValue(MI, 3, Fixups, STI);
4279 op = getRegisterListOpValue(MI, 4, Fixups, STI);
4290 op = getRegisterListOpValue(MI, 4, Fixups, STI);
4299 op = getRegisterListOpValue(MI, 4, Fixups, STI);
8529 op = getRegisterListOpValue(MI, 3, Fixups, STI);
8545 op = getRegisterListOpValue(MI, 3, Fixups, STI);
8560 op = getRegisterListOpValue(MI, 3, Fixups, STI);
8676 op = getRegisterListOpValue(MI, 3, Fixups, STI);
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMCodeEmitter.cpp | 321 unsigned getRegisterListOpValue(const MachineInstr &MI, unsigned Op) in getRegisterListOpValue() function in __anon6238cde10111::ARMCodeEmitter
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| D | ARMInstrInfo.td | 369 let EncoderMethod = "getRegisterListOpValue";
377 let EncoderMethod = "getRegisterListOpValue";
385 let EncoderMethod = "getRegisterListOpValue";
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| /external/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 528 let EncoderMethod = "getRegisterListOpValue";
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 535 let EncoderMethod = "getRegisterListOpValue";
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 457 let EncoderMethod = "getRegisterListOpValue";
467 let EncoderMethod = "getRegisterListOpValue";
475 let EncoderMethod = "getRegisterListOpValue";
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 540 let EncoderMethod = "getRegisterListOpValue";
553 let EncoderMethod = "getRegisterListOpValue";
564 let EncoderMethod = "getRegisterListOpValue";
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 6759 op = getRegisterListOpValue(MI, 0, Fixups, STI);
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