/external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 50 OS << getRegisterName(RegNo); in printRegName() 69 O << '\t' << getRegisterName(Dst.getReg()) in printInst() 70 << ", " << getRegisterName(MO1.getReg()); in printInst() 72 O << ", " << getRegisterName(MO2.getReg()); in printInst() 88 O << '\t' << getRegisterName(Dst.getReg()) in printInst() 89 << ", " << getRegisterName(MO1.getReg()); in printInst() 118 O << "\t{" << getRegisterName(MI->getOperand(1).getReg()) << "}"; in printInst() 139 O << "\t{" << getRegisterName(MI->getOperand(0).getReg()) << "}"; in printInst() 178 O << '\t' << getRegisterName(BaseReg); in printInst() 204 O << getRegisterName(Reg); in printOperand() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/InstPrinter/ |
D | LanaiInstPrinter.cpp | 33 OS << StringRef(getRegisterName(RegNo)).lower(); in printRegName() 75 << getRegisterName(MI->getOperand(1).getReg()) << "], %" in printMemoryLoadIncrement() 76 << getRegisterName(MI->getOperand(0).getReg()); in printMemoryLoadIncrement() 81 << getRegisterName(MI->getOperand(1).getReg()) << decIncOperator(MI) in printMemoryLoadIncrement() 82 << "], %" << getRegisterName(MI->getOperand(0).getReg()); in printMemoryLoadIncrement() 93 OS << "\t" << Opcode << "\t%" << getRegisterName(MI->getOperand(0).getReg()) in printMemoryStoreIncrement() 95 << getRegisterName(MI->getOperand(1).getReg()) << "]"; in printMemoryStoreIncrement() 99 OS << "\t" << Opcode << "\t%" << getRegisterName(MI->getOperand(0).getReg()) in printMemoryStoreIncrement() 100 << ", [%" << getRegisterName(MI->getOperand(1).getReg()) in printMemoryStoreIncrement() 151 OS << "%" << getRegisterName(Op.getReg()); in printOperand() [all …]
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/external/llvm/lib/Target/Lanai/InstPrinter/ |
D | LanaiInstPrinter.cpp | 33 OS << StringRef(getRegisterName(RegNo)).lower(); in printRegName() 75 << getRegisterName(MI->getOperand(1).getReg()) << "], %" in printMemoryLoadIncrement() 76 << getRegisterName(MI->getOperand(0).getReg()); in printMemoryLoadIncrement() 81 << getRegisterName(MI->getOperand(1).getReg()) << decIncOperator(MI) in printMemoryLoadIncrement() 82 << "], %" << getRegisterName(MI->getOperand(0).getReg()); in printMemoryLoadIncrement() 93 OS << "\t" << Opcode << "\t%" << getRegisterName(MI->getOperand(0).getReg()) in printMemoryStoreIncrement() 95 << getRegisterName(MI->getOperand(1).getReg()) << "]"; in printMemoryStoreIncrement() 99 OS << "\t" << Opcode << "\t%" << getRegisterName(MI->getOperand(0).getReg()) in printMemoryStoreIncrement() 100 << ", [%" << getRegisterName(MI->getOperand(1).getReg()) in printMemoryStoreIncrement() 151 OS << "%" << getRegisterName(Op.getReg()); in printOperand() [all …]
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 48 OS << getRegisterName(RegNo); in printRegName() 100 O << '\t' << AsmMnemonic << '\t' << getRegisterName(Op0.getReg()) in printInst() 101 << ", " << getRegisterName(getWRegFromXReg(Op1.getReg())); in printInst() 136 O << '\t' << AsmMnemonic << '\t' << getRegisterName(Op0.getReg()) in printInst() 137 << ", " << getRegisterName(Op1.getReg()) << ", #" << shift; in printInst() 146 << getRegisterName(Op0.getReg()) << ", " << getRegisterName(Op1.getReg()) in printInst() 154 << getRegisterName(Op0.getReg()) << ", " << getRegisterName(Op1.getReg()) in printInst() 173 O << "\tbfc\t" << getRegisterName(Op0.getReg()) in printInst() 183 O << "\tbfi\t" << getRegisterName(Op0.getReg()) << ", " in printInst() 184 << getRegisterName(Op2.getReg()) << ", #" << LSB << ", #" << Width; in printInst() [all …]
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D | AArch64InstPrinter.h | 41 return getRegisterName(RegNo); in getRegName() 43 static const char *getRegisterName(unsigned RegNo, 181 return getRegisterName(RegNo); in getRegName() 183 static const char *getRegisterName(unsigned RegNo,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.cpp | 57 OS << getRegisterName(RegNo); in printRegName() 109 O << '\t' << AsmMnemonic << '\t' << getRegisterName(Op0.getReg()) in printInst() 110 << ", " << getRegisterName(getWRegFromXReg(Op1.getReg())); in printInst() 145 O << '\t' << AsmMnemonic << '\t' << getRegisterName(Op0.getReg()) in printInst() 146 << ", " << getRegisterName(Op1.getReg()) << ", #" << shift; in printInst() 155 << getRegisterName(Op0.getReg()) << ", " << getRegisterName(Op1.getReg()) in printInst() 163 << getRegisterName(Op0.getReg()) << ", " << getRegisterName(Op1.getReg()) in printInst() 182 O << "\tbfc\t" << getRegisterName(Op0.getReg()) in printInst() 192 O << "\tbfi\t" << getRegisterName(Op0.getReg()) << ", " in printInst() 193 << getRegisterName(Op2.getReg()) << ", #" << LSB << ", #" << Width; in printInst() [all …]
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D | AArch64InstPrinter.h | 44 return getRegisterName(RegNo); in getRegName() 47 static const char *getRegisterName(unsigned RegNo, 211 return getRegisterName(RegNo); in getRegName() 214 static const char *getRegisterName(unsigned RegNo,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/InstPrinter/ |
D | SystemZInstPrinter.cpp | 33 O << '%' << getRegisterName(Index); in printAddress() 38 O << '%' << getRegisterName(Base); in printAddress() 46 O << '%' << getRegisterName(MO.getReg()); in printOperand() 63 O << '%' << getRegisterName(RegNo); in printRegName() 203 O << ",%" << getRegisterName(Base); in printBDLAddrOperand() 212 O << Disp << "(%" << getRegisterName(Length); in printBDRAddrOperand() 214 O << ",%" << getRegisterName(Base); in printBDRAddrOperand()
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/external/llvm/lib/Target/SystemZ/InstPrinter/ |
D | SystemZInstPrinter.cpp | 30 O << '%' << getRegisterName(Index); in printAddress() 35 O << '%' << getRegisterName(Base); in printAddress() 43 O << '%' << getRegisterName(MO.getReg()); in printOperand() 60 O << '%' << getRegisterName(RegNo); in printRegName() 202 O << ",%" << getRegisterName(Base); in printBDLAddrOperand()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
D | BPFAsmPrinter.cpp | 61 O << BPFInstPrinter::getRegisterName(MO.getReg()); in printOperand() 118 O << "(" << BPFInstPrinter::getRegisterName(BaseMO.getReg()) << " - " << -Offset << ")"; in PrintAsmMemoryOperand() 120 O << "(" << BPFInstPrinter::getRegisterName(BaseMO.getReg()) << " + " << Offset << ")"; in PrintAsmMemoryOperand()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/ |
D | X86ATTInstPrinter.cpp | 39 OS << '%' << getRegisterName(RegNo); in printRegName() 51 EmitAnyX86InstComments(MI, *CommentStream, getRegisterName); in printInst() 94 O << '%' << getRegisterName(Op.getReg()); in printOperand()
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D | X86IntelInstPrinter.cpp | 32 OS << getRegisterName(RegNo); in printRegName() 42 EmitAnyX86InstComments(MI, *CommentStream, getRegisterName); in printInst() 86 PrintRegName(O, getRegisterName(Op.getReg())); in printOperand()
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
D | AlphaAsmPrinter.cpp | 52 static const char *getRegisterName(unsigned RegNo); 77 O << getRegisterName(MO.getReg()); in printOperand() 90 O << getRegisterName(MO.getReg()); in printOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/MCTargetDesc/ |
D | SparcTargetStreamer.cpp | 31 << "%" << StringRef(SparcInstPrinter::getRegisterName(reg)).lower() in emitSparcRegisterIgnore() 37 << "%" << StringRef(SparcInstPrinter::getRegisterName(reg)).lower() in emitSparcRegisterScratch()
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/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
D | SparcTargetStreamer.cpp | 31 << "%" << StringRef(SparcInstPrinter::getRegisterName(reg)).lower() in emitSparcRegisterIgnore() 37 << "%" << StringRef(SparcInstPrinter::getRegisterName(reg)).lower() in emitSparcRegisterScratch()
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/external/capstone/arch/AArch64/ |
D | AArch64InstPrinter.c | 41 static char *getRegisterName(unsigned RegNo, int AltIdx); 115 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst() 116 getRegisterName(getWRegFromXReg(MCOperand_getReg(Op1)), AArch64_NoRegAltName)); in AArch64_printInst() 165 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst() 166 getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); in AArch64_printInst() 191 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst() 192 getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); in AArch64_printInst() 219 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst() 220 getRegisterName(MCOperand_getReg(Op1), AArch64_NoRegAltName)); in AArch64_printInst() 258 getRegisterName(MCOperand_getReg(Op0), AArch64_NoRegAltName), in AArch64_printInst() [all …]
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/external/libunwind_llvm/src/ |
D | Registers.hpp | 56 static const char *getRegisterName(int num); 201 inline const char *Registers_x86::getRegisterName(int regNum) { in getRegisterName() function in libunwind::Registers_x86 263 static const char *getRegisterName(int num); 442 inline const char *Registers_x86_64::getRegisterName(int regNum) { in getRegisterName() function in libunwind::Registers_x86_64 577 static const char *getRegisterName(int num); 983 inline const char *Registers_ppc::getRegisterName(int regNum) { in getRegisterName() function in libunwind::Registers_ppc 1143 static const char *getRegisterName(int num); 1541 inline const char *Registers_ppc64::getRegisterName(int regNum) { in getRegisterName() function in libunwind::Registers_ppc64 1786 static const char *getRegisterName(int num); 1873 inline const char *Registers_arm64::getRegisterName(int regNum) { in getRegisterName() function in libunwind::Registers_arm64 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
D | XCoreAsmPrinter.cpp | 210 O << XCoreInstPrinter::getRegisterName(MO.getReg()); in printOperand() 272 << XCoreInstPrinter::getRegisterName(MI->getOperand(0).getReg()) << ", " in EmitInstruction() 273 << XCoreInstPrinter::getRegisterName(MI->getOperand(1).getReg()); in EmitInstruction() 281 << XCoreInstPrinter::getRegisterName(MI->getOperand(1).getReg()) << '\n'; in EmitInstruction()
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/external/llvm/lib/Target/XCore/ |
D | XCoreAsmPrinter.cpp | 214 O << XCoreInstPrinter::getRegisterName(MO.getReg()); in printOperand() 276 << XCoreInstPrinter::getRegisterName(MI->getOperand(0).getReg()) << ", " in EmitInstruction() 277 << XCoreInstPrinter::getRegisterName(MI->getOperand(1).getReg()); in EmitInstruction() 285 << XCoreInstPrinter::getRegisterName(MI->getOperand(1).getReg()) << '\n'; in EmitInstruction()
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/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
D | XCoreAsmPrinter.cpp | 79 static const char *getRegisterName(unsigned RegNo); 228 O << getRegisterName(MO.getReg()); in printOperand() 310 O << "\tmov " << getRegisterName(MI->getOperand(0).getReg()) << ", " in EmitInstruction() 311 << getRegisterName(MI->getOperand(1).getReg()); in EmitInstruction()
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/external/llvm/lib/Target/BPF/InstPrinter/ |
D | BPFInstPrinter.cpp | 57 O << getRegisterName(Op.getReg()); in printOperand() 78 O << '(' << getRegisterName(RegOp.getReg()) << ')'; in printMemOperand()
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/InstPrinter/ |
D | MSP430InstPrinter.cpp | 50 O << getRegisterName(Op.getReg()); in printOperand() 85 O << '(' << getRegisterName(Base.getReg()) << ')'; in printSrcMemOperand()
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/external/llvm/lib/Target/MSP430/InstPrinter/ |
D | MSP430InstPrinter.cpp | 51 O << getRegisterName(Op.getReg()); in printOperand() 87 O << '(' << getRegisterName(Base.getReg()) << ')'; in printSrcMemOperand()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/InstPrinter/ |
D | MSP430InstPrinter.cpp | 51 O << getRegisterName(Op.getReg()); in printOperand() 87 O << '(' << getRegisterName(Base.getReg()) << ')'; in printSrcMemOperand()
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
D | SparcAsmPrinter.cpp | 53 static const char *getRegisterName(unsigned RegNo); 85 O << "%" << LowercaseString(getRegisterName(MO.getReg())); in printOperand() 150 operand = "%" + LowercaseString(getRegisterName(MO.getReg())); in printGetPCX()
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