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Searched refs:getSizeInBits (Results 1 – 25 of 279) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DValueTypes.h84 unsigned BitWidth = EltTy.getSizeInBits(); in changeVectorElementTypeToInteger()
100 return MVT::getIntegerVT(getSizeInBits()); in changeTypeToInteger()
184 return (getSizeInBits() & 7) == 0; in isByteSized()
189 unsigned BitSize = getSizeInBits(); in isRound()
196 return getSizeInBits() == VT.getSizeInBits(); in bitsEq()
202 return getSizeInBits() > VT.getSizeInBits(); in bitsGT()
208 return getSizeInBits() >= VT.getSizeInBits(); in bitsGE()
214 return getSizeInBits() < VT.getSizeInBits(); in bitsLT()
220 return getSizeInBits() <= VT.getSizeInBits(); in bitsLE()
256 unsigned getSizeInBits() const { in getSizeInBits() function
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DMachineValueType.h429 unsigned getSizeInBits() const { in getSizeInBits() function
516 return getScalarType().getSizeInBits(); in getScalarSizeInBits()
522 return (getSizeInBits() + 7) / 8; in getStoreSize()
533 return getSizeInBits() > VT.getSizeInBits(); in bitsGT()
538 return getSizeInBits() >= VT.getSizeInBits(); in bitsGE()
543 return getSizeInBits() < VT.getSizeInBits(); in bitsLT()
548 return getSizeInBits() <= VT.getSizeInBits(); in bitsLE()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMRegisterBankInfo.cpp252 LargeTy.getSizeInBits() <= 32 in getInstrMapping()
262 Ty.getSizeInBits() == 64 in getInstrMapping()
274 OperandsMapping =Ty.getSizeInBits() == 64 in getInstrMapping()
282 Ty.getSizeInBits() == 64 in getInstrMapping()
296 if (ToTy.getSizeInBits() == 64 && FromTy.getSizeInBits() == 32) in getInstrMapping()
305 if (ToTy.getSizeInBits() == 32 && FromTy.getSizeInBits() == 64) in getInstrMapping()
315 if ((FromTy.getSizeInBits() == 32 || FromTy.getSizeInBits() == 64) && in getInstrMapping()
316 ToTy.getSizeInBits() == 32) in getInstrMapping()
318 FromTy.getSizeInBits() == 64 in getInstrMapping()
329 if (FromTy.getSizeInBits() == 32 && in getInstrMapping()
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DARMInstructionSelector.cpp127 const unsigned Size = MRI.getType(Reg).getSizeInBits(); in guessRegClass()
177 assert(MRI.getType(VReg0).getSizeInBits() == 64 && in selectMergeValues()
182 assert(MRI.getType(VReg1).getSizeInBits() == 32 && in selectMergeValues()
187 assert(MRI.getType(VReg2).getSizeInBits() == 32 && in selectMergeValues()
208 assert(MRI.getType(VReg0).getSizeInBits() == 32 && in selectUnmergeValues()
213 assert(MRI.getType(VReg1).getSizeInBits() == 32 && in selectUnmergeValues()
218 assert(MRI.getType(VReg2).getSizeInBits() == 64 && in selectUnmergeValues()
403 if (MRI.getType(Reg).getSizeInBits() != ExpectedSize) { in validReg()
695 if (DstTy.getSizeInBits() != 32) { in select()
701 unsigned SrcSize = SrcTy.getSizeInBits(); in select()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DValueTypes.h103 unsigned BitWidth = EltTy.getSizeInBits(); in changeVectorElementTypeToInteger()
120 return MVT::getIntegerVT(getSizeInBits()); in changeTypeToInteger()
213 return (getSizeInBits() & 7) == 0; in isByteSized()
218 unsigned BitSize = getSizeInBits(); in isRound()
225 return getSizeInBits() == VT.getSizeInBits(); in bitsEq()
231 return getSizeInBits() > VT.getSizeInBits(); in bitsGT()
237 return getSizeInBits() >= VT.getSizeInBits(); in bitsGE()
243 return getSizeInBits() < VT.getSizeInBits(); in bitsLT()
249 return getSizeInBits() <= VT.getSizeInBits(); in bitsLE()
292 unsigned getSizeInBits() const { in getSizeInBits() function
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64LegalizerInfo.cpp102 return Query.Types[0].getSizeInBits() <= Query.Types[1].getSizeInBits(); in AArch64LegalizerInfo()
109 return isPowerOf2_32(Ty1.getSizeInBits()) && in AArch64LegalizerInfo()
110 (Ty1.getSizeInBits() == 1 || Ty1.getSizeInBits() >= 8); in AArch64LegalizerInfo()
120 return Query.Types[0].getSizeInBits() >= Query.Types[1].getSizeInBits(); in AArch64LegalizerInfo()
129 return isPowerOf2_32(Ty0.getSizeInBits()) && in AArch64LegalizerInfo()
130 (Ty0.getSizeInBits() == 1 || Ty0.getSizeInBits() >= 8); in AArch64LegalizerInfo()
170 return Query.Types[0].getSizeInBits() != Query.MMODescrs[0].Size * 8; in AArch64LegalizerInfo()
188 Query.Types[0].getSizeInBits() != Query.MMODescrs[0].Size * 8; in AArch64LegalizerInfo()
259 return Query.Types[0].getSizeInBits() != Query.Types[1].getSizeInBits(); in AArch64LegalizerInfo()
307 if (EltTy.getSizeInBits() < 8 || EltTy.getSizeInBits() > 64) in AArch64LegalizerInfo()
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DAArch64RegisterBankInfo.cpp275 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI); in getInstrAlternativeMappings()
296 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI); in getInstrAlternativeMappings()
332 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI); in getInstrAlternativeMappings()
409 unsigned Size = Ty.getSizeInBits(); in getSameKindOfOperandsMapping()
427 RBIdx, OpTy.getSizeInBits()) == in getSameKindOfOperandsMapping()
487 getFPExtMapping(DstTy.getSizeInBits(), SrcTy.getSizeInBits()), in getInstrMapping()
507 unsigned Size = getSizeInBits(DstReg, MRI, TRI); in getInstrMapping()
520 unsigned Size = DstTy.getSizeInBits(); in getInstrMapping()
521 bool DstIsGPR = !DstTy.isVector() && DstTy.getSizeInBits() <= 64; in getInstrMapping()
522 bool SrcIsGPR = !SrcTy.isVector() && SrcTy.getSizeInBits() <= 64; in getInstrMapping()
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DAArch64InstructionSelector.cpp146 if (Ty.getSizeInBits() <= 32) in getRegClassForTypeOnBank()
149 if (Ty.getSizeInBits() == 64) in getRegClassForTypeOnBank()
156 if (Ty.getSizeInBits() <= 16) in getRegClassForTypeOnBank()
158 if (Ty.getSizeInBits() == 32) in getRegClassForTypeOnBank()
160 if (Ty.getSizeInBits() == 64) in getRegClassForTypeOnBank()
162 if (Ty.getSizeInBits() == 128) in getRegClassForTypeOnBank()
363 const unsigned DstSize = MRI.getType(DstReg).getSizeInBits(); in selectCopy()
365 const unsigned SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI); in selectCopy()
374 DstSize <= RBI.getSizeInBits(SrcReg, MRI, TRI)) || in selectCopy()
432 const unsigned DstSize = DstTy.getSizeInBits(); in selectFPConvOpc()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.cpp109 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
138 unsigned Size = getSizeInBits(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
211 unsigned Size = getSizeInBits(MI.getOperand(i).getReg(), MRI, *TRI); in getDefaultMappingSOP()
225 unsigned Size0 = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getDefaultMappingVOP()
232 unsigned Size1 = getSizeInBits(Reg1, MRI, *TRI); in getDefaultMappingVOP()
237 unsigned Size = getSizeInBits(MI.getOperand(OpdIdx).getReg(), MRI, *TRI); in getDefaultMappingVOP()
251 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMappingForLoad()
252 unsigned PtrSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMappingForLoad()
324 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
330 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
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DAMDGPULegalizerInfo.cpp81 return Query.Types[0].getSizeInBits() <= 512; in AMDGPULegalizerInfo()
114 LLT IdxTy = LLT::scalar(PtrTy.getSizeInBits()); in AMDGPULegalizerInfo()
129 switch (Ty0.getSizeInBits()) { in AMDGPULegalizerInfo()
168 return VecTy.getSizeInBits() % 32 == 0 && in AMDGPULegalizerInfo()
169 VecTy.getSizeInBits() <= 512 && in AMDGPULegalizerInfo()
170 IdxTy.getSizeInBits() == 32; in AMDGPULegalizerInfo()
179 return (Ty0.getSizeInBits() % 32 == 0) && in AMDGPULegalizerInfo()
180 (Ty1.getSizeInBits() % 32 == 0); in AMDGPULegalizerInfo()
192 return BigTy.getSizeInBits() % 32 == 0 && in AMDGPULegalizerInfo()
193 LitTy.getSizeInBits() % 32 == 0 && in AMDGPULegalizerInfo()
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/external/swiftshader/third_party/LLVM/utils/TableGen/
DTGValueTypes.cpp25 virtual unsigned getSizeInBits() const = 0;
36 unsigned getSizeInBits() const { in getSizeInBits() function in ExtendedIntegerType
50 unsigned getSizeInBits() const { in getSizeInBits() function in ExtendedVectorType
51 return getNumElements() * getElementType().getSizeInBits(); in getSizeInBits()
84 return isExtendedVector() && getSizeInBits() == 64; in isExtended64BitVector()
89 return isExtendedVector() && getSizeInBits() == 128; in isExtended128BitVector()
104 return LLVMTy->getSizeInBits(); in getExtendedSizeInBits()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DValueTypes.h242 unsigned getSizeInBits() const { in getSizeInBits() function
291 return (getSizeInBits() + 7) / 8; in getStoreSize()
448 unsigned BitWidth = EltTy.getSizeInBits(); in changeVectorElementTypeToInteger()
520 return (getSizeInBits() & 7) == 0; in isByteSized()
525 unsigned BitSize = getSizeInBits(); in isRound()
532 return getSizeInBits() == VT.getSizeInBits(); in bitsEq()
538 return getSizeInBits() > VT.getSizeInBits(); in bitsGT()
544 return getSizeInBits() >= VT.getSizeInBits(); in bitsGE()
550 return getSizeInBits() < VT.getSizeInBits(); in bitsLT()
556 return getSizeInBits() <= VT.getSizeInBits(); in bitsLE()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86RegisterBankInfo.cpp66 switch (Ty.getSizeInBits()) { in getPartialMappingIdx()
83 switch (Ty.getSizeInBits()) { in getPartialMappingIdx()
94 switch (Ty.getSizeInBits()) { in getPartialMappingIdx()
219 bool isFPTrunc = (Ty0.getSizeInBits() == 32 || Ty0.getSizeInBits() == 64) && in getInstrMapping()
220 Ty1.getSizeInBits() == 128 && Opc == TargetOpcode::G_TRUNC; in getInstrMapping()
222 Ty0.getSizeInBits() == 128 && in getInstrMapping()
223 (Ty1.getSizeInBits() == 32 || Ty1.getSizeInBits() == 64) && in getInstrMapping()
262 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, TRI); in getInstrAlternativeMappings()
DX86InstructionSelector.cpp171 if (Ty.getSizeInBits() <= 8) in getRegClass()
173 if (Ty.getSizeInBits() == 16) in getRegClass()
175 if (Ty.getSizeInBits() == 32) in getRegClass()
177 if (Ty.getSizeInBits() == 64) in getRegClass()
181 if (Ty.getSizeInBits() == 32) in getRegClass()
183 if (Ty.getSizeInBits() == 64) in getRegClass()
185 if (Ty.getSizeInBits() == 128) in getRegClass()
187 if (Ty.getSizeInBits() == 256) in getRegClass()
189 if (Ty.getSizeInBits() == 512) in getRegClass()
234 const unsigned DstSize = RBI.getSizeInBits(DstReg, MRI, TRI); in selectCopy()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp245 if (Ty.getSizeInBits() != Val.getBitWidth()) in buildConstant()
247 Val.getValue().sextOrTrunc(Ty.getSizeInBits())); in buildConstant()
255 getMRI()->getType(Res).getSizeInBits()); in buildConstant()
272 ConstantFP::get(Ctx, getAPFloatFromSize(Val, DstTy.getSizeInBits())); in buildFConstant()
358 if (getMRI()->getType(Res).getSizeInBits() > in buildExtOrTrunc()
359 getMRI()->getType(Op).getSizeInBits()) in buildExtOrTrunc()
361 else if (getMRI()->getType(Res).getSizeInBits() < in buildExtOrTrunc()
362 getMRI()->getType(Op).getSizeInBits()) in buildExtOrTrunc()
410 assert(Index + getMRI()->getType(Res).getSizeInBits() <= in buildExtract()
411 getMRI()->getType(Src).getSizeInBits() && in buildExtract()
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DLegalizerHelper.cpp176 unsigned Size = LLTy.getSizeInBits(); in libcall()
209 unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in libcall()
210 unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in libcall()
221 unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in libcall()
222 unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in libcall()
234 unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in libcall()
235 unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in libcall()
248 unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in libcall()
249 unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in libcall()
275 uint64_t SizeOp0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in narrowScalar()
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DLegalityPredicates.cpp64 return QueryTy.isScalar() && QueryTy.getSizeInBits() < Size; in narrowerThan()
72 return QueryTy.isScalar() && QueryTy.getSizeInBits() > Size; in widerThan()
79 return QueryTy.isScalar() && !isPowerOf2_32(QueryTy.getSizeInBits()); in sizeNotPow2()
/external/llvm/lib/Target/X86/Utils/
DX86ShuffleDecode.cpp94 unsigned VectorSizeInBits = VT.getSizeInBits(); in DecodeMOVDDUPMask()
108 unsigned VectorSizeInBits = VT.getSizeInBits(); in DecodePSLLDQMask()
122 unsigned VectorSizeInBits = VT.getSizeInBits(); in DecodePSRLDQMask()
139 unsigned Offset = Imm * (VT.getVectorElementType().getSizeInBits() / 8); in DecodePALIGNRMask()
141 unsigned NumLanes = VT.getSizeInBits() / 128; in DecodePALIGNRMask()
160 unsigned NumLanes = VT.getSizeInBits() / 128; in DecodePSHUFMask()
222 unsigned NumLanes = VT.getSizeInBits() / 128; in DecodeSHUFPMask()
246 unsigned NumLanes = VT.getSizeInBits() / 128; in DecodeUNPCKHMask()
266 unsigned NumLanes = VT.getSizeInBits() / 128; in DecodeUNPCKLMask()
284 unsigned Scale = DstVT.getSizeInBits() / SrcVT.getSizeInBits(); in DecodeSubVectorBroadcast()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/
DLowLevelType.cpp22 VT.getVectorNumElements(), VT.getVectorElementType().getSizeInBits(), in LLT()
27 assert(VT.getSizeInBits() != 0 && "invalid zero-sized type"); in LLT()
29 VT.getSizeInBits(), /*AddressSpace=*/0); in LLT()
/external/swiftshader/third_party/LLVM/lib/VMCore/
DValueTypes.cpp24 EVT IntTy = getIntegerVT(Context, getVectorElementType().getSizeInBits()); in changeExtendedVectorElementTypeToInteger()
59 return isExtendedVector() && getSizeInBits() == 64; in isExtended64BitVector()
63 return isExtendedVector() && getSizeInBits() == 128; in isExtended128BitVector()
67 return isExtendedVector() && getSizeInBits() == 256; in isExtended256BitVector()
71 return isExtendedVector() && getSizeInBits() == 512; in isExtended512BitVector()
102 return "i" + utostr(getSizeInBits()); in getEVTString()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp282 assert(VT.getSizeInBits() == Op.getOperand(1).getValueType().getSizeInBits() in ExpandVSELECT()
291 APInt::getAllOnesValue(VT.getScalarType().getSizeInBits()), VT); in ExpandVSELECT()
309 assert((SVT.getSizeInBits() == 64 || SVT.getSizeInBits() == 32) && in ExpandUINT_TO_FLOAT()
312 unsigned BW = SVT.getSizeInBits(); in ExpandUINT_TO_FLOAT()
318 uint64_t HWMask = (SVT.getSizeInBits()==64)?0x00000000FFFFFFFF:0x0000FFFF; in ExpandUINT_TO_FLOAT()
365 (EltVT.getSizeInBits()), EltVT), in UnrollVSETCC()
DLegalizeIntegerTypes.cpp249 NOutVT.getSizeInBits()), in PromoteIntRes_BITCAST()
269 unsigned DiffBits = NVT.getSizeInBits() - OVT.getSizeInBits(); in PromoteIntRes_BSWAP()
318 DAG.getConstant(NVT.getSizeInBits() - in PromoteIntRes_CTLZ()
319 OVT.getSizeInBits(), NVT)); in PromoteIntRes_CTLZ()
336 APInt TopBit(NVT.getSizeInBits(), 0); in PromoteIntRes_CTTZ()
337 TopBit.setBit(OVT.getSizeInBits()); in PromoteIntRes_CTTZ()
662 DAG.getIntPtrConstant(SmallVT.getSizeInBits())); in PromoteIntRes_XMULO()
718 DAG.getConstant(i * RegVT.getSizeInBits(), in PromoteIntRes_VAARG()
890 DAG.getConstant(OVT.getSizeInBits(), TLI.getPointerTy())); in PromoteIntOp_BUILD_PAIR()
905 assert(N->getOperand(0).getValueType().getSizeInBits() >= in PromoteIntOp_BUILD_VECTOR()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DMachineValueType.h624 unsigned getSizeInBits() const { in getSizeInBits() function
756 return getScalarType().getSizeInBits(); in getScalarSizeInBits()
762 return (getSizeInBits() + 7) / 8; in getStoreSize()
773 return getSizeInBits() > VT.getSizeInBits(); in bitsGT()
778 return getSizeInBits() >= VT.getSizeInBits(); in bitsGE()
783 return getSizeInBits() < VT.getSizeInBits(); in bitsLT()
788 return getSizeInBits() <= VT.getSizeInBits(); in bitsLE()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp569 unsigned SrcEltBits = SrcEltVT.getSizeInBits(); in ExpandLoad()
574 unsigned WideBits = WideVT.getSizeInBits(); in ExpandLoad()
643 unsigned ScalarSize = MemSclVT.getSizeInBits(); in ExpandStore()
743 DAG.getConstant(APInt::getAllOnesValue(BitTy.getSizeInBits()), DL, in ExpandSELECT()
758 APInt::getAllOnesValue(BitTy.getSizeInBits()), DL, MaskTy); in ExpandSELECT()
778 unsigned BW = VT.getScalarType().getSizeInBits(); in ExpandSEXTINREG()
779 unsigned OrigBW = OrigTy.getScalarType().getSizeInBits(); in ExpandSEXTINREG()
825 unsigned EltWidth = VT.getVectorElementType().getSizeInBits(); in ExpandSIGN_EXTEND_VECTOR_INREG()
826 unsigned SrcEltWidth = SrcVT.getVectorElementType().getSizeInBits(); in ExpandSIGN_EXTEND_VECTOR_INREG()
959 if (VT.getSizeInBits() != Op1.getValueType().getSizeInBits()) in ExpandVSELECT()
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/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp760 unsigned MemBits = VT.getScalarType().getSizeInBits(); in computeKnownBitsForTargetNode()
1933 if (VT.getSizeInBits() < InVT.getSizeInBits()) { in LowerVectorFP_TO_INT()
1941 if (VT.getSizeInBits() > InVT.getSizeInBits()) { in LowerVectorFP_TO_INT()
1991 if (VT.getSizeInBits() < InVT.getSizeInBits()) { in LowerVectorINT_TO_FP()
1999 if (VT.getSizeInBits() > InVT.getSizeInBits()) { in LowerVectorINT_TO_FP()
2090 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
2114 if (OrigTy.getSizeInBits() >= 64) in addRequiredExtensionForVectorMULL()
2132 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); in isExtendedBUILD_VECTOR()
2159 unsigned EltSize = VT.getVectorElementType().getSizeInBits() / 2; in skipExtensionForVectorMULL()
2553 unsigned ArgSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments()
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