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Searched refs:getSlotIndexes (Results 1 – 25 of 31) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DSplitKit.cpp232 std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); in calcLiveBlockInfo()
384 LRCalc[0].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in reset()
387 LRCalc[1].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in reset()
525 SlotIndexes &Indexes = *LIS.getSlotIndexes(); in buildSingleSubRegCopy()
546 SlotIndexes &Indexes = *LIS.getSlotIndexes(); in buildCopy()
1176 std::tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(&*MBB); in transferValues()
1293 SubLRC.reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in extendPHIKillRanges()
1296 LI.computeSubRangeUndefs(Undefs, PS.LaneMask, MRI, *LIS.getSlotIndexes()); in extendPHIKillRanges()
1389 SubLRC.reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in rewriteAssigned()
1392 LI.computeSubRangeUndefs(Undefs, S.LaneMask, MRI, *LIS.getSlotIndexes()); in rewriteAssigned()
[all …]
DLiveIntervals.cpp198 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in computeVirtRegInterval()
266 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in computeRegUnitRange()
617 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in extendToIndices()
1401 SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI); in findLastUseBefore()
1411 SlotIndexes *Indexes = LIS.getSlotIndexes(); in findLastUseBefore()
1657 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in constructMainRangeFromSubranges()
DLiveRegMatrix.cpp173 return Range.overlaps(UnitRange, CP, *LIS->getSlotIndexes()); in checkRegUnitInterference()
DCalcSpillWeights.cpp310 if (updateLI && li.isZeroLength(LIS.getSlotIndexes()) && in weightCalcHelper()
DRenameIndependentSubregs.cpp304 const SlotIndexes &Indexes = *LIS->getSlotIndexes(); in computeMainRangesFixFlags()
DLiveRangeEdit.cpp178 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); in rematerializeAt()
DRegisterCoalescer.cpp1586 ? LIS->getSlotIndexes()->getIndexBefore(*UseMI) in updateRegDefsUses()
1919 SlotIndexes *Indexes = LIS->getSlotIndexes(); in joinReservedPhysReg()
2200 NewVNInfo(newVNInfo), CP(cp), LIS(lis), Indexes(LIS->getSlotIndexes()), in JoinVals()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DSplitKit.cpp168 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); in calcLiveBlockInfo()
423 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late) in defFromParent()
859 tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(MBB); in transferValues()
906 LRCalc[0].calculateValues(LIS.getSlotIndexes(), &MDT, in transferValues()
909 LRCalc[1].calculateValues(LIS.getSlotIndexes(), &MDT, in transferValues()
936 LIS.getSlotIndexes(), &MDT, &LIS.getVNInfoAllocator()); in extendPHIKillRanges()
986 getLRCalc(RegIdx).extend(LI, Idx.getNextSlot(), LIS.getSlotIndexes(), in rewriteAssigned()
1159 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(MBBNum); in splitLiveThroughBlock()
1262 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); in splitRegInBlock()
1354 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); in splitRegOutBlock()
DCalcSpillWeights.cpp168 if (li.isZeroLength(LIS.getSlotIndexes())) { in CalculateWeightAndHint()
DRegAllocBasic.cpp432 SlotIndexes *Indexes = LIS->getSlotIndexes(); in addMBBLiveIns()
577 VRM->rewrite(LIS->getSlotIndexes()); in runOnMachineFunction()
DLiveRangeEdit.cpp153 return lis.getSlotIndexes()->insertMachineInstrInMaps(--MI, Late) in rematerializeAt()
/external/llvm/lib/CodeGen/
DSplitKit.cpp206 std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); in calcLiveBlockInfo()
360 LRCalc[0].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in reset()
363 LRCalc[1].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in reset()
468 Def = LIS.getSlotIndexes() in defFromParent()
974 std::tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(&*MBB); in transferValues()
1274 std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(MBBNum); in splitLiveThroughBlock()
1377 std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); in splitRegInBlock()
1469 std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); in splitRegOutBlock()
DLiveIntervalAnalysis.cpp192 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in computeVirtRegInterval()
260 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in computeRegUnitRange()
579 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in extendToIndices()
1325 SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI); in findLastUseBefore()
1335 SlotIndexes *Indexes = LIS.getSlotIndexes(); in findLastUseBefore()
1573 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in constructMainRangeFromSubranges()
DLiveRegMatrix.cpp166 return Range.overlaps(UnitRange, CP, *LIS->getSlotIndexes()); in checkRegUnitInterference()
DCalcSpillWeights.cpp222 if (li.isZeroLength(LIS.getSlotIndexes()) && in calculateSpillWeightAndHint()
DRenameIndependentSubregs.cpp292 const SlotIndexes &Indexes = *LIS->getSlotIndexes(); in computeMainRangesFixFlags()
DLiveRangeEdit.cpp156 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); in rematerializeAt()
DRegisterCoalescer.cpp1303 ? LIS->getSlotIndexes()->getIndexBefore(*UseMI) in updateRegDefsUses()
1590 SlotIndexes *Indexes = LIS->getSlotIndexes(); in joinReservedPhysReg()
1869 NewVNInfo(newVNInfo), CP(cp), LIS(lis), Indexes(LIS->getSlotIndexes()), in JoinVals()
DLiveInterval.cpp1199 Idx = LIS.getSlotIndexes()->getIndexBefore(*MI); in Distribute()
/external/llvm/include/llvm/CodeGen/
DLiveIntervalAnalysis.h187 SlotIndexes *getSlotIndexes() const { in getSlotIndexes() function
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DLiveIntervals.h211 SlotIndexes *getSlotIndexes() const { in getSlotIndexes() function
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIFormMemoryClauses.cpp308 SlotIndexes *Ind = LIS->getSlotIndexes(); in runOnMachineFunction()
DGCNSchedStrategy.cpp430 SlotIndexes *Ind = LIS->getSlotIndexes(); in computeBlockPressure()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DLiveIntervalAnalysis.h176 SlotIndexes *getSlotIndexes() const { in getSlotIndexes() function
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.cpp266 const SlotIndexes &Indexes = *LIS.getSlotIndexes(); in shouldCoalesce()

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