| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86RegisterInfo.h | 78 getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const;
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| D | X86RegisterInfo.cpp | 115 X86RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, in getSubClassWithSubReg() function in X86RegisterInfo
123 return X86GenRegisterInfo::getSubClassWithSubReg(RC, Idx); in getSubClassWithSubReg()
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 71 getSubClassWithSubReg(const TargetRegisterClass *RC,
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| D | X86RegisterInfo.cpp | 93 X86RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, in getSubClassWithSubReg() function in X86RegisterInfo
101 return X86GenRegisterInfo::getSubClassWithSubReg(RC, Idx); in getSubClassWithSubReg()
110 A = X86GenRegisterInfo::getSubClassWithSubReg(A, X86::sub_8bit_hi); in getMatchingSuperRegClass()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 71 getSubClassWithSubReg(const TargetRegisterClass *RC,
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| D | X86RegisterInfo.cpp | 88 X86RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, in getSubClassWithSubReg() function in X86RegisterInfo
96 return X86GenRegisterInfo::getSubClassWithSubReg(RC, Idx); in getSubClassWithSubReg()
105 A = X86GenRegisterInfo::getSubClassWithSubReg(A, X86::sub_8bit_hi); in getMatchingSuperRegClass()
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| D | X86InstructionSelector.cpp | 737 SrcRC = TRI.getSubClassWithSubReg(SrcRC, SubIdx); in selectTruncOrPtrToInt()
1110 SrcRC = TRI.getSubClassWithSubReg(SrcRC, SubIdx); in emitExtractSubreg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.h | 50 getSubClassWithSubReg(const TargetRegisterClass *RC,
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| D | AArch64RegisterInfo.cpp | 76 AArch64RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, in getSubClassWithSubReg() function in AArch64RegisterInfo
85 return AArch64GenRegisterInfo::getSubClassWithSubReg(RC, Idx); in getSubClassWithSubReg()
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | CodeGenRegisters.h | 153 CodeGenRegisterClass *getSubClassWithSubReg(Record *SubIdx) const { in getSubClassWithSubReg() function
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| D | RegisterInfoEmitter.cpp | 804 if (CodeGenRegisterClass *SRC = RC.getSubClassWithSubReg(Idx)) in runTargetDesc()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 403 const TargetRegisterClass *RC = TRI->getSubClassWithSubReg(VRC, SubIdx); in ConstrainForSubReg()
416 RC = TRI->getSubClassWithSubReg(TLI->getRegClassFor(VT), SubIdx); in ConstrainForSubReg()
506 SRC = TRI->getSubClassWithSubReg(SRC, SubIdx); in EmitSubregNode()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 447 const TargetRegisterClass *RC = TRI->getSubClassWithSubReg(VRC, SubIdx); in ConstrainForSubReg()
460 RC = TRI->getSubClassWithSubReg(TLI->getRegClassFor(VT), SubIdx); in ConstrainForSubReg()
551 SRC = TRI->getSubClassWithSubReg(SRC, SubIdx); in EmitSubregNode()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 423 getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const =0;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 470 const TargetRegisterClass *RC = TRI->getSubClassWithSubReg(VRC, SubIdx); in ConstrainForSubReg()
483 RC = TRI->getSubClassWithSubReg(TLI->getRegClassFor(VT), SubIdx); in ConstrainForSubReg()
589 SRC = TRI->getSubClassWithSubReg(SRC, SubIdx); in EmitSubregNode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIFormMemoryClauses.cpp | 156 if (TRI->getSubClassWithSubReg(RC, Idx) != RC) in forAllLanes()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 535 getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const { in getSubClassWithSubReg() function
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 376 getSubClassWithSubReg(const CodeGenSubRegIndex *SubIdx) const { in getSubClassWithSubReg() function
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| D | CodeGenRegisters.cpp | 992 CodeGenRegisterClass *BiggestSuperRegRC = getSubClassWithSubReg(SubIdx); in getMatchingSubClassWithSubRegs()
1474 if (RegClass.getSubClassWithSubReg(&SubRegIndex) == nullptr) in computeSubRegLaneMasks()
2166 if (RC->getSubClassWithSubReg(&SubIdx) != RC) in inferMatchingSuperRegClass()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 349 getSubClassWithSubReg(const CodeGenSubRegIndex *SubIdx) const { in getSubClassWithSubReg() function
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| D | CodeGenRegisters.cpp | 1277 if (RegClass.getSubClassWithSubReg(&SubRegIndex) == nullptr) in computeSubRegLaneMasks()
1963 if (RC->getSubClassWithSubReg(&SubIdx) != RC) in inferMatchingSuperRegClass()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 570 getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const { in getSubClassWithSubReg() function
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| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 429 DstRC = TRI->getSubClassWithSubReg(DstRC, SubIdx); in INITIALIZE_PASS_DEPENDENCY()
439 TRI->getSubClassWithSubReg(MRI->getRegClass(SrcReg), SubIdx) != nullptr; in INITIALIZE_PASS_DEPENDENCY()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 475 DstRC = TRI->getSubClassWithSubReg(DstRC, SubIdx); in INITIALIZE_PASS_DEPENDENCY()
485 TRI->getSubClassWithSubReg(MRI->getRegClass(SrcReg), SubIdx) != nullptr; in INITIALIZE_PASS_DEPENDENCY()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | MachineVerifier.cpp | 754 TRI->getSubClassWithSubReg(RC, SubIdx); in visitMachineOperand()
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