/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCMIPeephole.cpp | 136 return MRI->getVRegDef(Reg); in getVRegDefOrNull() 306 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() 319 MachineInstr *LoadMI = MRI->getVRegDef(DefReg); in simplifyCode() 406 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() 416 MachineInstr *Splt = MRI->getVRegDef(ConvReg); in simplifyCode() 469 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() 481 MachineInstr *P1 = MRI->getVRegDef(DefsReg1); in simplifyCode() 482 MachineInstr *P2 = MRI->getVRegDef(DefsReg2); in simplifyCode() 530 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() 574 MachineInstr *SrcMI = MRI->getVRegDef(NarrowReg); in simplifyCode() [all …]
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D | PPCBranchCoalescing.cpp | 365 MachineInstr *Op1Def = MRI->getVRegDef(Op1.getReg()); in identicalOperands() 366 MachineInstr *Op2Def = MRI->getVRegDef(Op2.getReg()); in identicalOperands() 465 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg()); in canMoveToEnd()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | MLxExpansionPass.cpp | 95 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() 102 DefMI = MRI->getVRegDef(Reg); in getAccDefMI() 108 DefMI = MRI->getVRegDef(Reg); in getAccDefMI() 149 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() 160 DefMI = MRI->getVRegDef(SrcReg); in hasLoopHazard() 168 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() 174 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
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D | A15SDOptimizer.cpp | 158 MachineInstr *MI = MRI->getVRegDef(SReg); in getPrefSPRLane() 253 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in optimizeSDPattern() 254 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg()); in optimizeSDPattern() 305 MachineInstr *Def = MRI->getVRegDef(OpReg); in optimizeSDPattern() 348 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopies() 377 MachineInstr *NewMI = MRI->getVRegDef(Reg); in elideCopiesAndPHIs() 385 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopiesAndPHIs() 608 MachineInstr *Def = MRI->getVRegDef(*I); in runOnInstruction()
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/external/llvm/lib/Target/ARM/ |
D | MLxExpansionPass.cpp | 95 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() 102 DefMI = MRI->getVRegDef(Reg); in getAccDefMI() 108 DefMI = MRI->getVRegDef(Reg); in getAccDefMI() 149 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() 160 DefMI = MRI->getVRegDef(SrcReg); in hasLoopHazard() 168 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() 174 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
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D | A15SDOptimizer.cpp | 160 MachineInstr *MI = MRI->getVRegDef(SReg); in getPrefSPRLane() 259 MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in optimizeSDPattern() 260 MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg()); in optimizeSDPattern() 311 MachineInstr *Def = MRI->getVRegDef(OpReg); in optimizeSDPattern() 354 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopies() 383 MachineInstr *NewMI = MRI->getVRegDef(Reg); in elideCopiesAndPHIs() 391 MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopiesAndPHIs() 620 MachineInstr *Def = MRI->getVRegDef(*I); in runOnInstruction()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonHardwareLoops.cpp | 419 MachineInstr *DI = MRI->getVRegDef(PhiOpReg); in findInductionRegister() 429 if (MRI->getVRegDef(IndReg) == Phi && checkForImmediate(Opnd2, V)) { in findInductionRegister() 447 MachineInstr *PredI = MRI->getVRegDef(PredR); in findInductionRegister() 483 IVOp = MRI->getVRegDef(F->first); in findInductionRegister() 572 MachineInstr *IV_Phi = MRI->getVRegDef(IVReg); in getLoopTripCount() 618 MachineInstr *CondI = MRI->getVRegDef(PredReg); in getLoopTripCount() 666 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent(); in getLoopTripCount() 669 OldInsts.push_back(MRI->getVRegDef(R)); in getLoopTripCount() 673 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent(); in getLoopTripCount() 676 OldInsts.push_back(MRI->getVRegDef(R)); in getLoopTripCount() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonHardwareLoops.cpp | 440 MachineInstr *DI = MRI->getVRegDef(PhiOpReg); in findInductionRegister() 448 if (MRI->getVRegDef(IndReg) == Phi && checkForImmediate(Opnd2, V)) { in findInductionRegister() 466 MachineInstr *PredI = MRI->getVRegDef(PredR); in findInductionRegister() 502 IVOp = MRI->getVRegDef(F->first); in findInductionRegister() 605 MachineInstr *IV_Phi = MRI->getVRegDef(IVReg); in getLoopTripCount() 651 MachineInstr *CondI = MRI->getVRegDef(PredReg); in getLoopTripCount() 699 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent(); in getLoopTripCount() 705 OldInsts.push_back(MRI->getVRegDef(R)); in getLoopTripCount() 709 MachineBasicBlock *DefBB = MRI->getVRegDef(R)->getParent(); in getLoopTripCount() 715 OldInsts.push_back(MRI->getVRegDef(R)); in getLoopTripCount() [all …]
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D | HexagonVExtract.cpp | 78 MachineInstr *DI = MRI.getVRegDef(ExtIdxR); in genElemLoad() 128 MachineInstr *DefI = MRI.getVRegDef(VecR); in runOnMachineFunction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
D | BPFMIPeephole.cpp | 80 MachineInstr *DefInsn = MRI->getVRegDef(MovMI->getOperand(1).getReg()); in isMovFrom32Def() 95 MachineInstr *PhiDef = MRI->getVRegDef(opnd.getReg()); in isMovFrom32Def() 140 MachineInstr *SllMI = MRI->getVRegDef(ShfReg); in eliminateZExtSeq() 154 MachineInstr *MovMI = MRI->getVRegDef(SllMI->getOperand(1).getReg()); in eliminateZExtSeq()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
D | Utils.cpp | 187 MachineInstr *MI = MRI.getVRegDef(VReg); in getConstantVRegVal() 203 MachineInstr *MI = MRI.getVRegDef(VReg); in getConstantFPVRegVal() 211 auto *DefMI = MRI.getVRegDef(Reg); in getOpcodeDef() 220 DefMI = MRI.getVRegDef(SrcReg); in getOpcodeDef()
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D | InstructionSelector.cpp | 63 MachineInstr *RootI = MRI.getVRegDef(Root.getReg()); in isBaseWithConstantOffset() 68 MachineInstr *RHSI = MRI.getVRegDef(RHS.getReg()); in isBaseWithConstantOffset()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructionSelector.cpp | 245 int64_t Tgt = getConstant(MRI.getVRegDef(I.getOperand(1).getReg())); in selectG_INTRINSIC_W_SIDE_EFFECTS() 246 int64_t Enabled = getConstant(MRI.getVRegDef(I.getOperand(2).getReg())); in selectG_INTRINSIC_W_SIDE_EFFECTS() 247 int64_t Done = getConstant(MRI.getVRegDef(I.getOperand(7).getReg())); in selectG_INTRINSIC_W_SIDE_EFFECTS() 248 int64_t VM = getConstant(MRI.getVRegDef(I.getOperand(8).getReg())); in selectG_INTRINSIC_W_SIDE_EFFECTS() 261 int64_t Tgt = getConstant(MRI.getVRegDef(I.getOperand(1).getReg())); in selectG_INTRINSIC_W_SIDE_EFFECTS() 262 int64_t Enabled = getConstant(MRI.getVRegDef(I.getOperand(2).getReg())); in selectG_INTRINSIC_W_SIDE_EFFECTS() 266 int64_t Done = getConstant(MRI.getVRegDef(I.getOperand(5).getReg())); in selectG_INTRINSIC_W_SIDE_EFFECTS() 267 int64_t VM = getConstant(MRI.getVRegDef(I.getOperand(6).getReg())); in selectG_INTRINSIC_W_SIDE_EFFECTS()
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/external/llvm/lib/CodeGen/ |
D | OptimizePHIs.cpp | 107 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() 114 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg()); in IsSingleValuePHICycle()
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D | LiveVariables.cpp | 133 assert(MRI->getVRegDef(reg) && "Register use before def!"); in HandleVirtRegUse() 168 if (MBB == MRI->getVRegDef(reg)->getParent()) return; in HandleVirtRegUse() 179 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI); in HandleVirtRegUse() 596 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(), in runOnBlock() 660 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg)) in runOnMachineFunction() 732 const MachineInstr *Def = MRI.getVRegDef(Reg); in isLiveIn()
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D | MachinePipeliner.cpp | 2508 Schedule.stageScheduled(getSUnit(MRI.getVRegDef(LoopVal))); in generateExistingPhis() 2563 MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1); in generateExistingPhis() 2571 InstOp1 = MRI.getVRegDef(PhiOp1); in generateExistingPhis() 2585 if (MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1)) in generateExistingPhis() 2589 MachineInstr *PhiInst = MRI.getVRegDef(LoopVal); in generateExistingPhis() 2753 if (MachineInstr *InstOp2 = MRI.getVRegDef(PhiOp2)) in generatePhis() 2764 if (MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1)) { in generatePhis() 2905 MachineInstr *MI = MRI.getVRegDef(LCDef); in splitLifetimes() 3029 MachineInstr *BaseDef = MRI.getVRegDef(BaseReg); in computeDelta() 3032 BaseDef = MRI.getVRegDef(BaseReg); in computeDelta() [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCMIPeephole.cpp | 126 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() 203 MachineInstr *MI = MRI->getVRegDef(SrcReg); in lookThruCopyLike()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | OptimizePHIs.cpp | 116 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() 123 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg()); in IsSingleValuePHICycle()
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D | LiveVariables.cpp | 133 assert(MRI->getVRegDef(reg) && "Register use before def!"); in HandleVirtRegUse() 168 if (MBB == MRI->getVRegDef(reg)->getParent()) return; in HandleVirtRegUse() 179 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI); in HandleVirtRegUse() 596 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(), in runOnBlock() 660 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg)) in runOnMachineFunction() 732 const MachineInstr *Def = MRI.getVRegDef(Reg); in isLiveIn()
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D | MachinePipeliner.cpp | 2630 Schedule.stageScheduled(getSUnit(MRI.getVRegDef(LoopVal))); in generateExistingPhis() 2681 MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1); in generateExistingPhis() 2689 InstOp1 = MRI.getVRegDef(PhiOp1); in generateExistingPhis() 2703 if (MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1)) in generateExistingPhis() 2707 MachineInstr *PhiInst = MRI.getVRegDef(LoopVal); in generateExistingPhis() 2871 if (MachineInstr *InstOp2 = MRI.getVRegDef(PhiOp2)) in generatePhis() 2882 if (MachineInstr *InstOp1 = MRI.getVRegDef(PhiOp1)) { in generatePhis() 3029 MachineInstr *MI = MRI.getVRegDef(LCDef); in splitLifetimes() 3153 MachineInstr *BaseDef = MRI.getVRegDef(BaseReg); in computeDelta() 3156 BaseDef = MRI.getVRegDef(BaseReg); in computeDelta() [all …]
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | OptimizePHIs.cpp | 103 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg); in IsSingleValuePHICycle() 110 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg()); in IsSingleValuePHICycle()
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D | LiveVariables.cpp | 128 assert(MRI->getVRegDef(reg) && "Register use before def!"); in HandleVirtRegUse() 164 if (MBB == MRI->getVRegDef(reg)->getParent()) return; in HandleVirtRegUse() 175 MarkVirtRegAliveInBlock(VRInfo, MRI->getVRegDef(reg)->getParent(), *PI); in HandleVirtRegUse() 583 MarkVirtRegAliveInBlock(getVarInfo(*I),MRI->getVRegDef(*I)->getParent(), in runOnMachineFunction() 625 if (VirtRegInfo[Reg].Kills[j] == MRI->getVRegDef(Reg)) in runOnMachineFunction() 695 const MachineInstr *Def = MRI.getVRegDef(Reg); in isLiveIn()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | MLxExpansionPass.cpp | 92 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() 99 DefMI = MRI->getVRegDef(Reg); in getAccDefMI() 105 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
D | RISCVMergeBaseOffset.cpp | 147 MachineInstr &OffsetTail = *MRI->getVRegDef(Reg); in matchLargeOffset() 156 *MRI->getVRegDef(OffsetTail.getOperand(1).getReg()); in matchLargeOffset()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstructionSelector.cpp | 590 MachineInstr *CCMI = MRI.getVRegDef(CondReg); in selectCompareBranch() 592 CCMI = MRI.getVRegDef(CCMI->getOperand(1).getReg()); in selectCompareBranch() 1040 auto *PtrMI = MRI.getVRegDef(PtrReg); in select() 1051 PtrMI = MRI.getVRegDef(Ptr2Reg); in select() 1554 MachineInstr *Def = MRI.getVRegDef(Root.getReg()); in selectArithImmed() 1598 MachineInstr *RootDef = MRI.getVRegDef(Root.getReg()); in selectAddrModeUnscaled() 1605 MachineInstr *RHS = MRI.getVRegDef(OffImm.getReg()); in selectAddrModeUnscaled() 1639 MachineInstr *RootDef = MRI.getVRegDef(Root.getReg()); in selectAddrModeIndexed() 1653 MachineInstr *LHSDef = MRI.getVRegDef(LHS.getReg()); in selectAddrModeIndexed() 1654 MachineInstr *RHSDef = MRI.getVRegDef(RHS.getReg()); in selectAddrModeIndexed()
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