/external/clang/test/SemaCUDA/ |
D | cuda-builtin-vars.cu | 28 out[i++] = gridDim.x; in kernel() 29 gridDim.x = 0; // expected-error {{no setter defined for property 'x'}} in kernel() 30 out[i++] = gridDim.y; in kernel() 31 gridDim.y = 0; // expected-error {{no setter defined for property 'y'}} in kernel() 32 out[i++] = gridDim.z; in kernel() 33 gridDim.z = 0; // expected-error {{no setter defined for property 'z'}} in kernel()
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/external/eigen/unsupported/Eigen/CXX11/src/Tensor/ |
D | TensorReductionCuda.h | 116 const Index num_threads = blockDim.x * gridDim.x; in ReductionInitKernel() 130 if (gridDim.x == 1) { in FullReductionKernel() 158 eigen_assert(gridDim.x == 1 || *semaphore >= 2u); in FullReductionKernel() 178 if (gridDim.x > 1 && threadIdx.x == 0) { in FullReductionKernel() 180 atomicInc(semaphore, gridDim.x + 1); in FullReductionKernel() 193 eigen_assert(gridDim.x == 1); in ReductionInitFullReduxKernelHalfFloat() 206 const Index num_threads = blockDim.x * gridDim.x; in ReductionInitKernelHalfFloat() 226 if (gridDim.x == 1 && first_index == 0) { in FullReductionKernelHalfFloat() 256 if (gridDim.x == 1 && first_index == 0) { in FullReductionKernelHalfFloat() 380 eigen_assert(gridDim.y == 1); [all …]
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D | TensorRandom.h | 25 gridDim.x * blockDim.x * (blockIdx.y * blockDim.y + threadIdx.y); in get_random_seed()
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D | TensorExecutor.h | 240 const Index step_size = blockDim.x * gridDim.x;
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D | TensorConvolution.h | 585 const int plane_stride = blockDim.y * gridDim.y; 639 const int plane_stride = blockDim.z * gridDim.z;
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/external/clang/test/CodeGenCUDA/ |
D | cuda-builtin-vars.cu | 21 out[i++] = gridDim.x; // CHECK: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.x() in kernel() 22 out[i++] = gridDim.y; // CHECK: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.y() in kernel() 23 out[i++] = gridDim.z; // CHECK: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.z() in kernel()
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/external/tensorflow/tensorflow/core/kernels/ |
D | concat_lib_gpu_impl.cu.cc | 43 for (; gidx < total_cols; gidx += blockDim.x * gridDim.x) { in concat_fixed_kernel() 50 for (; gidy < total_rows; gidy += blockDim.y * gridDim.y) { in concat_fixed_kernel() 97 for (; gidx < total_cols; gidx += blockDim.x * gridDim.x) { in concat_variable_kernel() 109 for (; gidy < total_rows; gidy += blockDim.y * gridDim.y) in concat_variable_kernel()
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D | random_op_gpu.h | 136 const int32 total_thread_count = gridDim.x * blockDim.x; 175 const int32 total_thread_count = gridDim.x * blockDim.x;
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D | check_numerics_op_gpu.cu.cc | 41 const int32 total_thread_count = gridDim.x * blockDim.x; in CheckNumericsKernel()
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D | split_lib_gpu.cu.cc | 152 for (; gidx < total_cols; gidx += blockDim.x * gridDim.x) { in split_v_kernel() 164 for (; gidy < total_rows; gidy += blockDim.y * gridDim.y) in split_v_kernel()
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D | stateful_random_ops_gpu.cu.cc | 47 auto total_thread_count = gridDim.x * blockDim.x; in FillKernel()
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D | reduction_gpu_kernels.cu.h | 201 const int stride = blockDim.x * gridDim.x; 325 row += rows_per_warp * gridDim.y * blockDim.y; 326 for (; row < num_rows; row += rows_per_warp * gridDim.y * blockDim.y) { 354 out[col * gridDim.y + blockIdx.y] = s; 378 row += gridDim.y * blockDim.y; 381 for (; row < num_rows; row += gridDim.y * blockDim.y) { 411 out[col * gridDim.y + blockIdx.y] = s;
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D | relu_op_gpu.cu.cc | 42 const int32 total_device_threads = gridDim.x * blockDim.x; in ReluGradHalfKernel()
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D | parameterized_truncated_normal_op_gpu.cu.cc | 85 max_samples_per_item * (gridDim.x * blockDim.x); in TruncatedNormalKernel()
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D | bias_op_gpu.cu.cc | 136 index += blockDim.x * gridDim.x) { in BiasGradNHWC_SharedAtomics()
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D | depthwise_conv_op_gpu.h | 252 for (int b = blockIdx.x; b < in_blocks; b += gridDim.x) { in DepthwiseConv2dGPUKernelNHWCSmall() 539 for (int b = blockIdx.x; b < in_blocks; b += gridDim.x) { in DepthwiseConv2dGPUKernelNCHWSmall() 1247 for (int b = blockIdx.x; b < in_blocks; b += gridDim.x) { 1517 for (int b = blockIdx.x; b < in_blocks; b += gridDim.x) {
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D | conv_2d_gpu.h | 227 eigen_assert(gridDim.y == 1); 228 eigen_assert(gridDim.z == 1);
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/external/tensorflow/tensorflow/core/util/ |
D | cuda_device_functions.h | 91 gridDim.x * blockDim.x, count); in CudaGridRangeX() 99 gridDim.y * blockDim.y, count); in CudaGridRangeY() 107 gridDim.z * blockDim.z, count); in CudaGridRangeZ() 387 assert(blockDim.x * gridDim.x / blockDim.x == gridDim.x); in SetZero() 398 assert(blockDim.x * gridDim.x / blockDim.x == gridDim.x); in SetToValue()
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/external/tensorflow/tensorflow/examples/adding_an_op/ |
D | cuda_op_kernel.cu.cc | 23 i += blockDim.x * gridDim.x) { in AddOneKernel()
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/external/tensorflow/tensorflow/tools/ci_build/builds/user_ops/ |
D | cuda_op_kernel.cu.cc | 23 i += blockDim.x * gridDim.x) { in AddOneKernel()
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/external/clang/lib/Headers/ |
D | cuda_builtin_vars.h | 115 __CUDA_BUILTIN_VAR __cuda_builtin_gridDim_t gridDim; variable
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/external/tensorflow/tensorflow/contrib/mpi_collectives/ |
D | ring.cu.cc | 91 i += blockDim.x * gridDim.x) { in elemwise_accum()
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/external/tensorflow/tensorflow/contrib/mpi_collectives/kernels/ |
D | ring.cu.cc | 91 i += blockDim.x * gridDim.x) { in elemwise_accum()
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/external/skia/src/compute/hs/cuda/sm_35/ |
D | hs_cuda_macros.h | 181 #define HS_GLOBAL_SIZE_X() (gridDim.x * blockDim.x)
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/external/skqp/src/compute/hs/cuda/sm_35/ |
D | hs_cuda_macros.h | 181 #define HS_GLOBAL_SIZE_X() (gridDim.x * blockDim.x)
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