Searched refs:hasShiftedReg (Results 1 – 8 of 8) sorted by relevance
56 return (!AArch64InstrInfo::hasShiftedReg(*FirstMI)); in isArithmeticBccPair()104 return (!AArch64InstrInfo::hasShiftedReg(*FirstMI)); in isArithmeticCbzPair()229 return (!AArch64InstrInfo::hasShiftedReg(*FirstMI)); in isCCSelectPair()246 return (!AArch64InstrInfo::hasShiftedReg(*FirstMI)); in isCCSelectPair()
54 def RegShiftedPred : SchedPredicate<[{TII->hasShiftedReg(*MI)}]>;
67 static bool hasShiftedReg(const MachineInstr &MI);
1651 bool AArch64InstrInfo::hasShiftedReg(const MachineInstr &MI) { in hasShiftedReg() function in AArch64InstrInfo
11011 if ((TII->hasShiftedReg(*MI)))11017 if ((TII->hasShiftedReg(*MI)))11128 if ((TII->hasShiftedReg(*MI)))11134 if ((TII->hasShiftedReg(*MI)))11160 if ((TII->hasShiftedReg(*MI)))11190 if ((TII->hasShiftedReg(*MI)))11196 if ((TII->hasShiftedReg(*MI)))12947 if ((TII->hasShiftedReg(*MI)))12953 if ((TII->hasShiftedReg(*MI)))12965 if ((TII->hasShiftedReg(*MI)))[all …]
60 bool hasShiftedReg(const MachineInstr &MI) const;
1198 bool AArch64InstrInfo::hasShiftedReg(const MachineInstr &MI) const { in hasShiftedReg() function in AArch64InstrInfo