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Searched refs:hclk (Results 1 – 25 of 27) sorted by relevance

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/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_init.c1143 u32 tmp, hclk; in get_target_freq() local
1147 hclk = 84; in get_target_freq()
1160 hclk = 150; in get_target_freq()
1166 hclk = 165; in get_target_freq()
1170 hclk = 180; in get_target_freq()
1177 hclk = 200; in get_target_freq()
1182 hclk = 222; in get_target_freq()
1188 hclk = 250; in get_target_freq()
1194 hclk = 267; in get_target_freq()
1200 hclk = 300; in get_target_freq()
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Dddr3_dfs.c126 u32 hclk; in ddr3_dfs_high_2_low() local
128 get_target_freq(cpu_freq, &tmp, &hclk); in ddr3_dfs_high_2_low()
782 u32 hclk; in ddr3_dfs_low_2_high() local
784 get_target_freq(cpu_freq, &tmp, &hclk); in ddr3_dfs_low_2_high()
/external/u-boot/drivers/mtd/nand/
Dlpc32xx_nand_slc.c119 uint32_t hclk = get_hclk_clk_rate(); in lpc32xx_nand_init() local
134 TAC_W_WIDTH(hclk / CONFIG_LPC32XX_NAND_SLC_WWIDTH) | in lpc32xx_nand_init()
135 TAC_W_HOLD(hclk / CONFIG_LPC32XX_NAND_SLC_WHOLD) | in lpc32xx_nand_init()
136 TAC_W_SETUP(hclk / CONFIG_LPC32XX_NAND_SLC_WSETUP) | in lpc32xx_nand_init()
138 TAC_R_WIDTH(hclk / CONFIG_LPC32XX_NAND_SLC_RWIDTH) | in lpc32xx_nand_init()
139 TAC_R_HOLD(hclk / CONFIG_LPC32XX_NAND_SLC_RHOLD) | in lpc32xx_nand_init()
140 TAC_R_SETUP(hclk / CONFIG_LPC32XX_NAND_SLC_RSETUP), in lpc32xx_nand_init()
/external/u-boot/arch/arm/dts/
Dzynqmp-clk-ccf.dtsi193 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
198 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
203 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
208 clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
Dat91sam9261.dtsi81 clock-names = "ohci_clk", "hclk", "uhpck";
92 clock-names = "lcdc_clk", "hclk";
134 clock-names = "pclk", "hclk";
717 hclk0: hclk@16 {
723 hclk1: hclk@17 {
Dat91sam9x5_macb1.dtsi50 clock-names = "hclk", "pclk";
Dsama5d3_emac.dtsi50 clock-names = "hclk", "pclk";
Dat91sam9x5_macb0.dtsi62 clock-names = "hclk", "pclk";
Dzynq-7000.dtsi222 clock-names = "pclk", "hclk", "tx_clk";
233 clock-names = "pclk", "hclk", "tx_clk";
Dzynqmp.dtsi513 clock-names = "pclk", "hclk", "tx_clk";
526 clock-names = "pclk", "hclk", "tx_clk";
539 clock-names = "pclk", "hclk", "tx_clk";
552 clock-names = "pclk", "hclk", "tx_clk";
Dat91sam9263.dtsi877 clock-names = "hclk", "pclk";
886 clock-names = "pclk", "hclk";
1011 clock-names = "lcdc_clk", "hclk";
1038 clock-names = "ohci_clk", "hclk", "uhpck";
Dsama5d3_gmac.dtsi83 clock-names = "hclk", "pclk";
Dat91sam9g45.dtsi987 clock-names = "hclk", "pclk";
1177 clock-names = "pclk", "hclk";
1289 clock-names = "hclk", "lcdc_clk";
1317 clock-names = "ohci_clk", "hclk", "uhpck";
Dat91sam9260.dtsi871 clock-names = "hclk", "pclk";
880 clock-names = "pclk", "hclk";
1033 clock-names = "ohci_clk", "hclk", "uhpck";
Dsama5d2.dtsi38 clock-names = "ohci_clk", "hclk", "uhpck";
636 clock-names = "hclk", "pclk";
Dsama5d4.dtsi136 clock-names = "pclk", "hclk";
263 clock-names = "ohci_clk", "hclk", "uhpck";
970 clock-names = "hclk", "pclk";
1198 clock-names = "hclk", "pclk";
Dat91sam9rl.dtsi93 clock-names = "hclk", "lcdc_clk";
300 clock-names = "pclk", "hclk";
Dat91sam9n12.dtsi1015 clock-names = "pclk", "hclk";
1047 clock-names = "ohci_clk", "hclk", "uhpck";
Drk3xxx.dtsi180 clock-names = "hclk", "macref";
Dat91sam9x5.dtsi1132 clock-names = "hclk", "pclk";
1244 clock-names = "ohci_clk", "hclk", "uhpck";
Drk3188.dtsi93 clock-names = "hclk", "mclk";
Dsama5d3.dtsi1382 clock-names = "pclk", "hclk";
1496 clock-names = "ohci_clk", "hclk", "uhpck";
Drk3399.dtsi193 "hclk", "pm";
1340 clock-names = "mclk", "hclk";
/external/u-boot/arch/arm/mach-s5pc1xx/
Dclock.c217 unsigned long hclk; in get_hclk_sys() local
236 hclk = get_pll_clk(MPLL) / (hclk_sys_ratio + 1); in get_hclk_sys()
238 return hclk; in get_hclk_sys()
/external/u-boot/doc/device-tree-bindings/clock/
Dnvidia,tegra20-car.txt140 109 hclk

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