Home
last modified time | relevance | path

Searched refs:hws_ddr_phy (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training_ip_prv_if.h49 enum hws_ddr_phy phy_type, u32 reg_addr, u32 data);
52 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr, u32 *data);
101 u32 phy, enum hws_ddr_phy phy_type,
104 u32 phy, enum hws_ddr_phy phy_type,
Dddr3_training_ip_flow.h142 enum hws_ddr_phy phy_type,
145 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr,
149 enum hws_ddr_phy e_phy_type, u32 reg_addr,
Dddr3_training_ip_def.h150 enum hws_ddr_phy { enum
Dmv_ddr_plat.c590 enum hws_ddr_phy phy_type, u32 addr, in prfa_write()
613 enum hws_ddr_phy phy_type, u32 addr, u32 *data) in prfa_read()
Dddr3_training.c1128 enum hws_ddr_phy phy_type, u32 reg_addr, u32 *data) in ddr3_tip_bus_read()
1139 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr, in ddr3_tip_bus_write()
1152 enum hws_ddr_phy phy_type, u32 reg_addr, in ddr3_tip_bus_read_modify_write()
Dddr3_training_leveling.c1700 enum hws_ddr_phy subphy_type = DDR_PHY_DATA; in mv_ddr_rl_dqs_burst()