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Searched refs:imm18 (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUOperands.td143 def imm18 : PatLeaf<(imm), [{
144 // imm18 predicate: True if the immediate fits into an 18-bit unsigned field.
DSPUInstrInfo.td412 def r64: ILARegInst<R64C, u18imm_i64, imm18>;
413 def r32: ILARegInst<R32C, u18imm, imm18>;
417 def hi: ILARegInst<R32C, symbolHi, imm18>;
418 def lo: ILARegInst<R32C, symbolLo, imm18>;
421 [(set R32C:$rT, imm18:$val)]>;
/external/v8/src/mips/
Dassembler-mips.cc854 int32_t imm18 =((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14; in target_at() local
855 return (imm18 + pos); in target_at()
1555 int32_t imm18 = target_pos - at_offset; in label_at_put() local
1556 DCHECK_EQ(imm18 & 3, 0); in label_at_put()
1557 int32_t imm16 = imm18 >> 2; in label_at_put()
/external/v8/src/mips64/
Dassembler-mips64.cc785 int32_t imm18 =((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14; in target_at() local
786 return (imm18 + pos); in target_at()
1535 int32_t imm18 = target_pos - at_offset; in label_at_put() local
1536 DCHECK_EQ(imm18 & 3, 0); in label_at_put()
1537 int32_t imm16 = imm18 >> 2; in label_at_put()
Dsimulator-mips64.cc6513 int32_t imm18 = instr_.Imm18Value(); in DecodeTypeImmediate() local
6521 int64_t se_imm18 = imm18 | ((imm18 & 0x20000) ? 0xFFFFFFFFFFFC0000 : 0); in DecodeTypeImmediate()