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Searched refs:implicit (Results 1 – 25 of 1695) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
D	sdwa-peephole-instr.mir	6 # GFX89: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_sdwa 0, %{{[0-9]+}}, 0, 5, 0, 5, implicit $exec 7 # GFX89: %{{[0-9]+}}:vgpr_32 = V_FRACT_F32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, implicit $exec 8 # GFX89: %{{[0-9]+}}:vgpr_32 = V_SIN_F32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 5, implicit $exec 9 # GFX89: %{{[0-9]+}}:vgpr_32 = V_CVT_U32_F32_sdwa 0, %{{[0-9]+}}, 0, 5, 0, 5, implicit $exec 10 # GFX89: %{{[0-9]+}}:vgpr_32 = V_CVT_F32_I32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, implicit $exec 13 # GFX89: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_sdwa 0, %{{[0-9]+}}, 0, 6, 0, 5, implicit $exec 14 # GFX89: %{{[0-9]+}}:vgpr_32 = V_FRACT_F32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, implicit $exec 15 # GFX89: %{{[0-9]+}}:vgpr_32 = V_SIN_F32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 5, implicit $exec 16 # GFX89: %{{[0-9]+}}:vgpr_32 = V_CVT_U32_F32_sdwa 0, %{{[0-9]+}}, 0, 5, 0, 5, implicit $exec 17 # GFX89: %{{[0-9]+}}:vgpr_32 = V_CVT_F32_I32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, implicit $exec [all …]
D	break-vmem-soft-clauses.mir	10 ; GCN: $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 13 $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 23 ; GCN: $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 24 ; GCN-NEXT: $vgpr1 = FLAT_LOAD_DWORD $vgpr4_vgpr5, 0, 0, 0, implicit $exec, implicit $flat_scr 27 $vgpr0 = FLAT_LOAD_DWORD $vgpr2_vgpr3, 0, 0, 0, implicit $exec, implicit $flat_scr 28 $vgpr1 = FLAT_LOAD_DWORD $vgpr4_vgpr5, 0, 0, 0, implicit $exec, implicit $flat_scr 38 ; GCN: $vgpr0 = FLAT_LOAD_DWORD $vgpr3_vgpr4, 0, 0, 0, implicit $exec, implicit $flat_scr 39 ; GCN-NEXT: $vgpr1 = FLAT_LOAD_DWORD $vgpr5_vgpr6, 0, 0, 0, implicit $exec, implicit $flat_scr 40 ; GCN-NEXT: $vgpr2 = FLAT_LOAD_DWORD $vgpr7_vgpr8, 0, 0, 0, implicit $exec, implicit $flat_scr 43 $vgpr0 = FLAT_LOAD_DWORD $vgpr3_vgpr4, 0, 0, 0, implicit $exec, implicit $flat_scr [all …]
D	splitkit.mir	`21 S_NOP 0, implicit-def undef %0.sub0 : sreg_128 22 S_NOP 0, implicit-def %0.sub3 : sreg_128 25 …implicit-def dead $sgpr0, implicit-def dead $sgpr1, implicit-def dead $sgpr2, implicit-def dead $s… 27 S_NOP 0, implicit %0.sub0 28 S_NOP 0, implicit %0.sub3 29 S_NOP 0, implicit %0.sub0 30 S_NOP 0, implicit %0.sub3 40 # CHECK: S_NOP 0, implicit renamable [[REG0]] 41 # CHECK: S_NOP 0, implicit renamable [[REG1]] 45 # CHECK: S_NOP 0, implicit renamable $sgpr0 [all …]`
D	constant-fold-imm-immreg.mir	5 # GCN: %10:vgpr_32 = V_MOV_B32_e32 1543, implicit $exec 55 %9 = S_AND_B32 killed %7, killed %8, implicit-def dead $scc 57 BUFFER_STORE_DWORD_OFFSET killed %10, killed %6, 0, 0, 0, 0, 0, implicit $exec 65 # GCN: %9:vgpr_32 = V_MOV_B32_e32 646, implicit $exec 68 # GCN: %10:vgpr_32 = V_MOV_B32_e32 646, implicit $exec 71 # GCN: %11:vgpr_32 = V_MOV_B32_e32 646, implicit $exec 74 # GCN: %12:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec 77 # GCN: %13:vgpr_32 = V_MOV_B32_e32 63, implicit $exec 134 %31 = V_ASHRREV_I32_e64 31, %3, implicit $exec 136 %33 = V_LSHLREV_B64 2, killed %32, implicit $exec [all …]
D	memory_clause.mir	4 …ber %4:vreg_128, early-clobber %1:vreg_128, early-clobber %3:vreg_128 = BUNDLE %0, implicit $exec { 5 # GCN-NEXT: %1:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, 0, implicit $exec 6 # GCN-NEXT: %2:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 16, 0, 0, implicit $exec 7 # GCN-NEXT: %3:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 32, 0, 0, implicit $exec 8 # GCN-NEXT: %4:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 48, 0, 0, implicit $exec 10 # GCN-NEXT: GLOBAL_STORE_DWORDX4 %0, %1, 0, 0, 0, implicit $exec 24 %1:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, 0, implicit $exec 25 %2:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 16, 0, 0, implicit $exec 26 %3:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 32, 0, 0, implicit $exec 27 %4:vreg_128 = GLOBAL_LOAD_DWORDX4 %0, 48, 0, 0, implicit $exec [all …]
D	memory-legalizer-region.mir	19 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 20 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 1, 0, implicit $m0, implicit $exec :: (vol… 21 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 22 $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $sgpr0_sgpr1, implicit $exec 23 …illed renamable $vgpr0_vgpr1, killed renamable $vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr… 43 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 44 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 0, 1, implicit $m0, implicit $exec :: (vol… 45 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 46 $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $sgpr0_sgpr1, implicit $exec 47 …illed renamable $vgpr0_vgpr1, killed renamable $vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr… [all …]
D	memory-legalizer-local.mir	19 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 20 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 0, 0, implicit $m0, implicit $exec :: (vol… 21 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 22 $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $sgpr0_sgpr1, implicit $exec 23 …illed renamable $vgpr0_vgpr1, killed renamable $vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr… 43 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 44 …renamable $vgpr2 = DS_READ_B32 killed renamable $vgpr0, 0, 0, implicit $m0, implicit $exec :: (vol… 45 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 46 $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $sgpr0_sgpr1, implicit $exec 47 …illed renamable $vgpr0_vgpr1, killed renamable $vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr… [all …]
D	macro-fusion-cluster-vcc-uses.mir	4 # GCN: S_NOP 0, implicit-def $vcc 5 # GCN: dead %2:vgpr_32, %3:sreg_64_xexec = V_ADD_I32_e64 %0, %1, implicit $exec 6 # GCN: dead %4:vgpr_32, dead %5:sreg_64_xexec = V_ADDC_U32_e64 %6, %7, %3, implicit $exec 20 %0 = V_MOV_B32_e32 0, implicit $exec 21 %1 = V_MOV_B32_e32 0, implicit $exec 22 %2, %3 = V_ADD_I32_e64 %0, %1, implicit $exec 23 %6 = V_MOV_B32_e32 0, implicit $exec 24 %7 = V_MOV_B32_e32 0, implicit $exec 25 S_NOP 0, implicit def $vcc 26 %4, %5 = V_ADDC_U32_e64 %6, %7, %3, implicit $exec [all …]
D	merge-m0.mir	`67 SI_INIT_M0 -1, implicit-def $m0 68 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 69 SI_INIT_M0 -1, implicit-def $m0 70 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 71 SI_INIT_M0 65536, implicit-def $m0 72 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 73 SI_INIT_M0 65536, implicit-def $m0 74 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec 75 SI_INIT_M0 -1, implicit-def $m0 76 DS_WRITE_B32 %0, %1, 0, 0, implicit $m0, implicit $exec [all …]`
D	misched-killflags.mir	15 BUNDLE implicit-def $sgpr6_sgpr7, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $scc { 17 $sgpr6 = S_ADD_U32 internal $sgpr6, 0, implicit-def $scc 18 $sgpr7 = S_ADDC_U32 internal $sgpr7,0, implicit-def $scc, implicit internal $scc 21 …$vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $sg… 22 $vgpr1 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11 23 $vgpr2 = V_MOV_B32_e32 $sgpr10, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11 24 …$vgpr3 = V_MOV_B32_e32 $sgpr11, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11, implicit $exec 25 …S_NOP 0, implicit killed $sgpr6_sgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4, implici… 33 # CHECK: $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, impl… 34 # CHECK: BUNDLE implicit-def $sgpr6_sgpr7, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $… [all …]
D	detect-dead-lanes.mir	`6 # CHECK: S_NOP 0, implicit-def %0 7 # CHECK: S_NOP 0, implicit-def %1 8 # CHECK: S_NOP 0, implicit-def dead %2 10 # CHECK: S_NOP 0, implicit %3.sub0 11 # CHECK: S_NOP 0, implicit %3.sub1 12 # CHECK: S_NOP 0, implicit undef %3.sub2 15 # CHECK: S_NOP 0, implicit %4.sub0 16 # CHECK: S_NOP 0, implicit %4.sub1 17 # CHECK: S_NOP 0, implicit undef %5.sub0 28 S_NOP 0, implicit-def %0 [all …]`
D	memory-legalizer-invalid-addrspace.mir	12 $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr2_sgpr3 13 $vgpr1 = V_MOV_B32_e32 killed $sgpr3, implicit $exec, implicit $sgpr2_sgpr3, implicit $exec 14 …vgpr2 = FLAT_LOAD_DWORD killed renamable $vgpr0_vgpr1, 0, 0, 0, implicit $exec, implicit $flat_scr… 15 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 16 $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $sgpr0_sgpr1, implicit $exec 17 …illed renamable $vgpr0_vgpr1, killed renamable $vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr… 30 $vgpr2 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec 31 $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1 32 $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit $sgpr0_sgpr1, implicit $exec 33 …illed renamable $vgpr0_vgpr1, killed renamable $vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr… [all …]
D	sgpr-spill-wrong-stack-id.mir	36 # SHARE: SI_SPILL_S32_SAVE $sgpr5, %stack.2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, imp… 37 # SHARE: SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr5, 0, implicit $… 38 …_SAVE killed renamable $sgpr6_sgpr7, %stack.1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, … 39 … $sgpr6_sgpr7 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, … 40 …ble $sgpr6_sgpr7, @func, csr_amdgpu_highregs, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4, … 41 …SHARE: $sgpr5 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, … 42 # SHARE: $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr5, 0, implicit $exe… 43 … $sgpr6_sgpr7 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, … 44 …ble $sgpr6_sgpr7, @func, csr_amdgpu_highregs, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr4, … 45 …HARE: $sgpr5 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, … [all …]
D	subreg-split-live-in-error.mir	17 # S_CBRANCH_SCC1 %bb.2, implicit $vcc 53 S_CBRANCH_SCC0 %bb.2, implicit undef $scc 57 undef %3.sub0:vreg_128 = V_MOV_B32_e32 0, implicit $exec 64 S_CBRANCH_SCC0 %bb.4, implicit undef $scc 68 undef %3.sub0:vreg_128 = V_MOV_B32_e32 0, implicit $exec 78 %4:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 79 S_CBRANCH_SCC1 %bb.22, implicit undef $scc 84 %5:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 85 dead %6:vgpr_32 = V_MUL_F32_e32 0, undef %7:vgpr_32, implicit $exec 86 dead %8:vgpr_32 = V_MUL_F32_e32 0, %2, implicit $exec [all …]
D	waitcnt-back-edge-loop.mir	6 # GCN: $vgpr5 = V_CVT_I32_F32_e32 killed $vgpr5, implicit $exec 14 $vgpr1 = V_MOV_B32_e32 0, implicit $exec, implicit-def $vgpr1_vgpr2 15 $vgpr2 = V_MOV_B32_e32 0, implicit $exec, implicit-def $vgpr1_vgpr2 16 …$vgpr4 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile lo… 17 …$vgpr0 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile lo… 18 $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 3, killed $sgpr4, implicit $exec 19 $vgpr3 = V_CNDMASK_B32_e64 -1082130432, 1065353216, killed $sgpr0_sgpr1, implicit $exec 20 $vgpr5 = V_MOV_B32_e32 $vgpr0, implicit $exec, implicit $exec 26 …$vgpr5 = FLAT_LOAD_DWORD $vgpr1_vgpr2, 0, 0, 0, implicit $exec, implicit $flat_scr :: (volatile lo… 31 $vgpr5 = V_CVT_I32_F32_e32 killed $vgpr5, implicit $exec [all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
D	spill-fold.mir	19 …implicit-def dead $x0, 12, implicit-def dead $x1, 12, implicit-def dead $x2, 12, implicit-def dead… 21 RET_ReallyLR implicit $x0 33 …implicit-def dead $x0, 12, implicit-def dead $x1, 12, implicit-def dead $x2, 12, implicit-def dead… 35 RET_ReallyLR implicit $x0 47 …implicit-def dead $d0, 12, implicit-def dead $d1, 12, implicit-def dead $d2, 12, implicit-def dead… 49 RET_ReallyLR implicit $x0 61 …implicit-def dead $x0, 12, implicit-def dead $x1, 12, implicit-def dead $x2, 12, implicit-def dead… 65 RET_ReallyLR implicit $x0 77 …implicit-def dead $x0, 12, implicit-def dead $x1, 12, implicit-def dead $x2, 12, implicit-def dead… 81 RET_ReallyLR implicit $d0
D	spill-undef.mir	`57 …implicit-def dead early-clobber $x0, 12, implicit-def dead early-clobber $x1, 12, implicit-def dea… 60 …implicit-def dead early-clobber $x0, 12, implicit-def dead early-clobber $x1, 12, implicit-def dea… 65 RET_ReallyLR implicit killed $w0`
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
D	regalloc-bad-undef.mir	164 …ADJCALLSTACKDOWN 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit $r31, implicit $r3… 165 …implicit-def dead $d0, implicit-def dead $d1, implicit-def dead $d2, implicit-def dead $d3, implic… 166 …ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, impli… 169 …ADJCALLSTACKDOWN 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit $r31, implicit $r3… 170 …implicit-def dead $d0, implicit-def dead $d1, implicit-def dead $d2, implicit-def dead $d3, implic… 171 …ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, impli… 174 …ADJCALLSTACKDOWN 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit $r31, implicit $r3… 175 …implicit-def dead $d0, implicit-def dead $d1, implicit-def dead $d2, implicit-def dead $d3, implic… 176 …ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, impli… 182 …ADJCALLSTACKDOWN 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit $r31, implicit $r3… [all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
D	flags-copy-lowering.mir	119 CMP64rr %0, %1, implicit-def $eflags 122 ; CHECK: %[[A_REG:[^:]]]:gr8 = SETAr implicit $eflags 123 ; CHECK-NEXT: %[[B_REG:[^:]]]:gr8 = SETBr implicit $eflags 126 …DJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $s… 127 …CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implic… 128 …ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, … 131 JA_1 %bb.1, implicit $eflags 132 JB_1 %bb.2, implicit $eflags 136 ; CHECK: TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags 137 ; CHECK-NEXT: JNE_1 %bb.1, implicit killed $eflags [all …]
D	movtopush.mir	36 …CALLSTACKDOWN32 16, 0, 16, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $s… 37 # CHECK-NEXT: PUSH32i8 4, implicit-def $esp, implicit $esp 38 # CHECK-NEXT: PUSH32i8 3, implicit-def $esp, implicit $esp 39 # CHECK-NEXT: PUSH32i8 2, implicit-def $esp, implicit $esp 40 # CHECK-NEXT: PUSH32i8 1, implicit-def $esp, implicit $esp 41 # CHECK-NEXT: CALLpcrel32 @good, csr_32, implicit $esp, implicit $ssp, implicit-def $esp, implicit-… 42 …T: ADJCALLSTACKUP32 16, 0, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $s… 43 …CALLSTACKDOWN32 20, 0, 20, implicit-def dead $esp, implicit-def dead $eflags, implicit-def dead $s… 48 # CHECK-NEXT: PUSH32r %4, implicit-def $esp, implicit $esp 49 # CHECK-NEXT: PUSH32r %5, implicit-def $esp, implicit $esp [all …]
D	tail-call-conditional.mir	40 CMP64ri8 $rax, 99, implicit-def $eflags 41 JA_1 %bb.4, implicit $eflags 50 ; CHECK-NEXT: CMP64ri8 $rax, 9, implicit-def $eflags 51 …implicit $rsp, implicit $eflags, implicit $ssp, implicit $rsp, implicit $rdi, implicit $rsi, impli… 57 CMP64ri8 $rax, 9, implicit-def $eflags 58 JA_1 %bb.3, implicit $eflags 67 TCRETURNdi64 @f1, 0, csr_64, implicit $rsp, implicit $rdi, implicit $rsi 72 ; CHECK-NEXT: TCRETURNdi64 @f2, 0, csr_64, implicit $rsp, implicit $rdi, implicit $rsi 79 TCRETURNdi64 @f2, 0, csr_64, implicit $rsp, implicit $rdi, implicit $rsi 82 dead $eax = MOV32ri64 123, implicit-def $rax
D	machine-copy-prop.mir	`24 # CHECK-NEXT: NOOP implicit $rdi 26 # CHECK-NEXT: NOOP implicit $rax, implicit $rdi 31 NOOP implicit killed $rdi 33 NOOP implicit $rax, implicit $rdi 41 # CHECK-NEXT: NOOP implicit $edi 43 # CHECK-NEXT: NOOP implicit $rax, implicit $rdi 48 NOOP implicit killed $edi 50 NOOP implicit $rax, implicit $rdi 58 # CHECK-NEXT: NOOP implicit $rdi 60 # CHECK-NEXT: NOOP implicit $rax, implicit $rdi [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
D	scavenging.mir	`9 ; CHECK-NEXT: NOP implicit killed [[REG0]] 11 NOP implicit %0 15 ; CHECK-NEXT: NOP implicit [[REG1]] 17 ; CHECK-NEXT: NOP implicit killed [[REG1]] 20 NOP implicit %1 22 NOP implicit %1 25 ; CHECK-NEXT: NOP implicit [[REG2]] 27 NOP implicit %2 51 ; CHECK-NEXT: NOP implicit killed [[REG2]] 52 ; CHECK-NEXT: NOP implicit killed [[REG3]] [all …]`
/external/llvm/test/CodeGen/AMDGPU/
D	detect-dead-lanes.mir	`16 # CHECK: S_NOP 0, implicit-def %0 17 # CHECK: S_NOP 0, implicit-def %1 18 # CHECK: S_NOP 0, implicit-def dead %2 20 # CHECK: S_NOP 0, implicit %3:sub0 21 # CHECK: S_NOP 0, implicit %3:sub1 22 # CHECK: S_NOP 0, implicit undef %3:sub2 25 # CHECK: S_NOP 0, implicit %4:sub0 26 # CHECK: S_NOP 0, implicit %4:sub1 27 # CHECK: S_NOP 0, implicit undef %5:sub0 39 S_NOP 0, implicit-def %0 [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/GlobalISel/
D	irtranslator-callingconv.ll	`35 ; X32: RET 0, implicit $al 62 ; X64: RET 0, implicit $al 101 ; X32: RET 0, implicit $eax 122 ; X64: RET 0, implicit $eax 187 ; X32: RET 0, implicit $eax, implicit $edx 208 ; X64: RET 0, implicit $rax 227 ; X32: RET 0, implicit $fp0 237 ; X64: RET 0, implicit $xmm0 250 ; X32: RET 0, implicit $fp0 260 ; X64: RET 0, implicit $xmm0 [all …]`

12 3 4 5 6 7 8 9 10 >>...68

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