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Searched refs:imx_ccm (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx6/
Dclock.c24 struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; variable
31 reg = __raw_readl(&imx_ccm->CCGR2); in enable_ocotp_clk()
36 __raw_writel(reg, &imx_ccm->CCGR2); in enable_ocotp_clk()
44 clrbits_le32(&imx_ccm->CCGR4, in setup_gpmi_io_clk()
52 clrbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK); in setup_gpmi_io_clk()
54 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
60 setbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK); in setup_gpmi_io_clk()
62 clrbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_io_clk()
64 clrsetbits_le32(&imx_ccm->cs2cdr, in setup_gpmi_io_clk()
70 setbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_io_clk()
[all …]
/external/u-boot/arch/arm/mach-imx/mx7/
Dclock_slice.c18 struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; variable
425 reg = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_set_src()
428 __raw_writel(reg, &imx_ccm->root[clock_id].target_root); in clock_set_src()
443 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_get_src()
481 reg = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_set_prediv()
484 __raw_writel(reg, &imx_ccm->root[clock_id].target_root); in clock_set_prediv()
511 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_get_prediv()
540 reg = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_set_postdiv()
543 __raw_writel(reg, &imx_ccm->root[clock_id].target_root); in clock_set_postdiv()
560 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_get_postdiv()
[all …]
/external/u-boot/board/freescale/mx6sabreauto/
Dmx6sabreauto.c263 struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in eim_clk_setup() local
268 ccgr6 = readl(&imx_ccm->CCGR6); in eim_clk_setup()
270 writel(ccgr6, &imx_ccm->CCGR6); in eim_clk_setup()
277 cscmr1 = readl(&imx_ccm->cscmr1); in eim_clk_setup()
281 writel(cscmr1, &imx_ccm->cscmr1); in eim_clk_setup()
285 writel(ccgr6, &imx_ccm->CCGR6); in eim_clk_setup()
/external/u-boot/arch/arm/mach-imx/
Dcpu.c272 struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in get_ahb_clk() local
275 reg = __raw_readl(&imx_ccm->cbcdr); in get_ahb_clk()