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/external/libvpx/libvpx/vpx_dsp/mips/
Dfwd_txfm_msa.c32 v8i16 in8, in9, in10, in11, in12, in13, in14, in15; in fdct8x16_1d_column() local
44 LD_SH16(input, src_stride, in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in fdct8x16_1d_column()
48 SLLI_4V(in8, in9, in10, in11, 2); in fdct8x16_1d_column()
51 ADD4(in4, in11, in5, in10, in6, in9, in7, in8, tmp4, tmp5, tmp6, tmp7); in fdct8x16_1d_column()
56 SUB4(in4, in11, in5, in10, in6, in9, in7, in8, in11, in10, in9, in8); in fdct8x16_1d_column()
74 BUTTERFLY_4(in8, in9, stp22, stp23, stp30, stp31, stp32, stp33); in fdct8x16_1d_column()
86 BUTTERFLY_4(stp30, stp37, stp26, stp21, in8, in15, in14, in9); in fdct8x16_1d_column()
87 ILVRL_H2_SH(in15, in8, vec1, vec0); in fdct8x16_1d_column()
91 in8 = DOT_SHIFT_RIGHT_PCK_H(vec0, vec1, cnst0); in fdct8x16_1d_column()
92 ST_SH(in8, tmp_ptr); in fdct8x16_1d_column()
[all …]
Dfwd_dct32x32_msa.c60 v8i16 in8, in9, in10, in11, in12, in13, in14, in15; in fdct8x32_1d_column_even_store() local
70 LD_SH4(input + 64, 8, in8, in9, in10, in11); in fdct8x32_1d_column_even_store()
71 BUTTERFLY_8(in4, in5, in6, in7, in8, in9, in10, in11, vec4, vec5, vec6, vec7, in fdct8x32_1d_column_even_store()
72 in8, in9, in10, in11); in fdct8x32_1d_column_even_store()
103 ADD4(in8, vec3, in9, vec2, in14, vec5, in15, vec4, in0, vec1, vec6, in2); in fdct8x32_1d_column_even_store()
119 SUB4(in8, vec3, in15, vec4, in3, in2, in0, in1, in3, in0, vec2, vec5); in fdct8x32_1d_column_even_store()
256 v8i16 in8, in9, in10, in11, in12, in13, in14, in15; in fdct8x32_1d_row_load_butterfly() local
260 LD_SH8(temp_buff + 24, 32, in8, in9, in10, in11, in12, in13, in14, in15); in fdct8x32_1d_row_load_butterfly()
263 TRANSPOSE8x8_SH_SH(in8, in9, in10, in11, in12, in13, in14, in15, in8, in9, in fdct8x32_1d_row_load_butterfly()
265 BUTTERFLY_16(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11, in fdct8x32_1d_row_load_butterfly()
[all …]
Ddeblock_msa.c73 #define TRANSPOSE12x16_B(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, \ argument
85 ILVR_B2_SH(in9, in8, in11, in10, temp4, temp5); \
86 ILVR_B2_SH(in9, in8, in11, in10, temp4, temp5); \
100 ILVL_B4_SH(in9, in8, in11, in10, in13, in12, in15, in14, temp2, temp3, \
105 in8 = (v16u8)__msa_ilvr_d((v2i64)temp1, (v2i64)temp0); \
112 #define VPX_TRANSPOSE12x8_UB_UB(in0, in1, in2, in3, in4, in5, in6, in7, in8, \ argument
133 in8 = (v16u8)temp6; \
Dmacros_msa.h1073 #define ILVR_B8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, \ argument
1079 ILVR_B4(RTYPE, in8, in9, in10, in11, in12, in13, in14, in15, out4, out5, \
1690 #define BUTTERFLY_16(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, \ argument
1702 out7 = in7 + in8; \
1704 out8 = in7 - in8; \
1742 #define TRANSPOSE16x8_UB_UB(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, \ argument
1749 ILVEV_D2_UB(in0, in8, in1, in9, out7, out6); \
Dvpx_convolve8_msa.c829 v16u8 in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11, in12; in transpose16x16_to_dst() local
834 LD_UB8(src + 16 * 8, 16, in8, in9, in10, in11, in12, in13, in14, in15); in transpose16x16_to_dst()
836 TRANSPOSE16x8_UB_UB(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in transpose16x16_to_dst()
844 SLDI_B4_0_UB(in8, in9, in10, in11, in8, in9, in10, in11, 8); in transpose16x16_to_dst()
847 TRANSPOSE16x8_UB_UB(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in transpose16x16_to_dst()
/external/libaom/libaom/av1/common/x86/
Dintra_edge_sse4.c146 __m128i in8 = _mm_lddqu_si128((__m128i *)&in[8]); in av1_filter_intra_edge_high_sse4_1() local
149 __m128i in1 = _mm_alignr_epi8(in8, in0, 2); in av1_filter_intra_edge_high_sse4_1()
150 __m128i in2 = _mm_alignr_epi8(in8, in0, 4); in av1_filter_intra_edge_high_sse4_1()
166 in0 = in8; in av1_filter_intra_edge_high_sse4_1()
167 in8 = _mm_lddqu_si128((__m128i *)&in[8]); in av1_filter_intra_edge_high_sse4_1()
175 __m128i in8 = _mm_lddqu_si128((__m128i *)&in[8]); in av1_filter_intra_edge_high_sse4_1() local
178 __m128i in1 = _mm_alignr_epi8(in8, in0, 2); in av1_filter_intra_edge_high_sse4_1()
179 __m128i in2 = _mm_alignr_epi8(in8, in0, 4); in av1_filter_intra_edge_high_sse4_1()
180 __m128i in3 = _mm_alignr_epi8(in8, in0, 6); in av1_filter_intra_edge_high_sse4_1()
181 __m128i in4 = _mm_alignr_epi8(in8, in0, 8); in av1_filter_intra_edge_high_sse4_1()
[all …]
/external/u-boot/drivers/input/
Di8042.c20 #define in8(p) inb(p) macro
57 while ((in8(I8042_STS_REG) & STATUS_IBF) && kbd_timeout--) in kbd_input_empty()
67 while (((in8(I8042_STS_REG) & STATUS_OBF) == 0) && kbd_timeout--) in kbd_output_full()
103 return in8(reg); in kbd_read()
167 return in8(I8042_STS_REG) != 0xff; in kbd_controller_present()
192 while (timeout > 0 && !(in8(I8042_STS_REG) & STATUS_OBF)) { in i8042_flush()
198 if (in8(I8042_STS_REG) & STATUS_OBF) in i8042_flush()
199 in8(I8042_DATA_REG); in i8042_flush()
223 if ((in8(I8042_STS_REG) & STATUS_OBF) == 0) { in i8042_kbd_check()
230 scan_code = in8(I8042_DATA_REG); in i8042_kbd_check()
/external/tensorflow/tensorflow/core/kernels/
Daggregate_ops_cpu.h107 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) {
109 in7, in8);
120 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) {
122 in7, in8);
133 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8,
136 in7, in8, in9);
215 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) {
217 in7, in8);
228 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) {
230 in7, in8);
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Daggregate_ops_gpu.cu.cc109 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { in operator ()()
111 in7, in8); in operator ()()
122 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { in operator ()()
124 in7, in8); in operator ()()
135 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, in operator ()()
138 in7, in8, in9); in operator ()()
Daggregate_ops.h160 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8);
170 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { in Compute()
171 out.device(d) = in1 + in2 + in3 + in4 + in5 + in6 + in7 + in8; in Compute()
184 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8);
194 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8) { in Compute()
195 out.device(d) += in1 + in2 + in3 + in4 + in5 + in6 + in7 + in8; in Compute()
206 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8,
217 typename TTypes<T>::ConstFlat in7, typename TTypes<T>::ConstFlat in8, in Compute()
219 out.device(d) = in1 + in2 + in3 + in4 + in5 + in6 + in7 + in8 + in9; in Compute()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dcirc_ldd_bug.ll86 %var8.0.in8.unr = phi i8* [ %4, %unr.cmp ], [ %11, %for.body.unr ]
88 %16 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr, i8* %3, i32 %or, i32 -8)
100 %var8.0.in8.unr19 = phi i8* [ %4, %unr.cmp24 ], [ %16, %for.body.unr13 ]
102 %21 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr19, i8* %3, i32 %or, i32 -8)
114 %var8.0.in8.unr28 = phi i8* [ %4, %unr.cmp33 ], [ %21, %for.body.unr17 ]
116 %26 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr28, i8* %3, i32 %or, i32 -8)
128 %var8.0.in8.unr37 = phi i8* [ %4, %unr.cmp42 ], [ %26, %for.body.unr26 ]
130 %31 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr37, i8* %3, i32 %or, i32 -8)
142 %var8.0.in8.unr46 = phi i8* [ %4, %unr.cmp51 ], [ %31, %for.body.unr35 ]
144 %36 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr46, i8* %3, i32 %or, i32 -8)
[all …]
/external/llvm/test/CodeGen/Hexagon/
Dcirc_ldd_bug.ll86 %var8.0.in8.unr = phi i8* [ %4, %unr.cmp ], [ %11, %for.body.unr ]
88 %16 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr, i8* %3, i32 %or, i32 -8)
100 %var8.0.in8.unr19 = phi i8* [ %4, %unr.cmp24 ], [ %16, %for.body.unr13 ]
102 %21 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr19, i8* %3, i32 %or, i32 -8)
114 %var8.0.in8.unr28 = phi i8* [ %4, %unr.cmp33 ], [ %21, %for.body.unr17 ]
116 %26 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr28, i8* %3, i32 %or, i32 -8)
128 %var8.0.in8.unr37 = phi i8* [ %4, %unr.cmp42 ], [ %26, %for.body.unr26 ]
130 %31 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr37, i8* %3, i32 %or, i32 -8)
142 %var8.0.in8.unr46 = phi i8* [ %4, %unr.cmp51 ], [ %31, %for.body.unr35 ]
144 %36 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr46, i8* %3, i32 %or, i32 -8)
[all …]
/external/webp/src/dsp/
Denc_sse41.c210 __m128i in8 = _mm_loadu_si128((__m128i*)&in[8]); in DoQuantizeBlock_SSE41() local
218 __m128i coeff8 = _mm_abs_epi16(in8); in DoQuantizeBlock_SSE41()
266 out8 = _mm_sign_epi16(out8, in8); in DoQuantizeBlock_SSE41()
270 in8 = _mm_mullo_epi16(out8, q8); in DoQuantizeBlock_SSE41()
273 _mm_storeu_si128((__m128i*)&in[8], in8); in DoQuantizeBlock_SSE41()
/external/libvpx/libvpx/vp9/encoder/mips/msa/
Dvp9_fdct16x16_msa.c368 v8i16 in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11; in postproc_fdct16x8_1d_row() local
373 LD_SH8(temp, 16, in8, in9, in10, in11, in12, in13, in14, in15); in postproc_fdct16x8_1d_row()
376 TRANSPOSE8x8_SH_SH(in8, in9, in10, in11, in12, in13, in14, in15, in8, in9, in postproc_fdct16x8_1d_row()
382 FDCT_POSTPROC_2V_NEG_H(in8, in9); in postproc_fdct16x8_1d_row()
386 BUTTERFLY_16(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, in10, in11, in postproc_fdct16x8_1d_row()
388 tmp7, in8, in9, in10, in11, in12, in13, in14, in15); in postproc_fdct16x8_1d_row()
390 ST_SH8(in8, in9, in10, in11, in12, in13, in14, in15, temp, 16); in postproc_fdct16x8_1d_row()
394 LD_SH8(temp, 16, in8, in9, in10, in11, in12, in13, in14, in15); in postproc_fdct16x8_1d_row()
395 FDCT8x16_ODD(in8, in9, in10, in11, in12, in13, in14, in15, in0, in1, in2, in3, in postproc_fdct16x8_1d_row()
/external/u-boot/drivers/rtc/
Dmc146818.c18 #define in8(p) inb(p) macro
54 return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg); in mc146818_read8()
64 return in8(RTC_PORT_MC146818 + ofs + 1); in mc146818_read8()
Dmk48t59.c25 return in8(RTC_PORT_DATA); in rtc_read()
39 return in8(RTC(reg)); in rtc_read()
Dds174x.c161 uchar val = in8( addr ); in rtc_read()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Reassociate/
Dlong-chains.ll4 define i8 @longchain(i8 %in1, i8 %in2, i8 %in3, i8 %in4, i8 %in5, i8 %in6, i8 %in7, i8 %in8, i8 %in…
13 %tmp9 = add i8 %tmp8, %in8
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Damdhsa-trap-num-sgprs.ll16 i32 addrspace(1)* %out8, i32 %in8,
47 store i32 %in8, i32 addrspace(1)* %out8
Dhsa-metadata-kernel-code-props.ll51 i32 %in8, i32 %in9, i32 %ina, i32 %inb, [8 x i32],
62 store i32 %in8, i32 addrspace(1)* %out8
/external/u-boot/arch/powerpc/include/asm/
Dppc.h60 unsigned char in8(unsigned int);
/external/deqp-deps/glslang/Test/
Ddecls.frag17 int in8[4] = int[](21, 22, 23, 24), ip;
/external/deqp-deps/glslang/Test/baseResults/
Ddecls.frag.out78 0:17 'in8' ( global 4-element array of int)
204 0:? 'in8' ( global 4-element array of int)
323 0:17 'in8' ( global 4-element array of int)
449 0:? 'in8' ( global 4-element array of int)
/external/libvpx/libvpx/vpx_dsp/ppc/
Dinv_txfm_vsx.c427 #define IDCT16(in0, in1, in2, in3, in4, in5, in6, in7, in8, in9, inA, inB, \ argument
432 out1 = in8; \
458 STEP8_0(out8, outF, in8, inF, cospi30_v, cospi2_v); \
472 out8 = vec_add(in8, in9); \
473 out9 = vec_sub(in8, in9); \
489 in8 = out8; \
531 out8 = vec_add(in8, inB); \
534 outB = vec_sub(in8, inB); \
549 in8 = out8; \
564 out7 = vec_add(in7, in8); \
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/external/syzkaller/pkg/ifuzz/
Dpseudo.go461 func (gen *generator) in8(port uint16) { func
481 gen.in8(port)

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