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Searched refs:in_8 (Results 1 – 25 of 65) sorted by relevance

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/external/u-boot/board/freescale/c29xpcie/
Dcpld.c30 reg11 = in_8(&cpld_data->flhcsr); in cpld_set_altbank()
71 printf("chipid1 = 0x%02x\n", in_8(&cpld_data->chipid1)); in cpld_dump_regs()
72 printf("chipid2 = 0x%02x\n", in_8(&cpld_data->chipid2)); in cpld_dump_regs()
73 printf("hwver = 0x%02x\n", in_8(&cpld_data->hwver)); in cpld_dump_regs()
74 printf("cpldver = 0x%02x\n", in_8(&cpld_data->cpldver)); in cpld_dump_regs()
75 printf("rstcon = 0x%02x\n", in_8(&cpld_data->rstcon)); in cpld_dump_regs()
76 printf("flhcsr = 0x%02x\n", in_8(&cpld_data->flhcsr)); in cpld_dump_regs()
77 printf("wdcsr = 0x%02x\n", in_8(&cpld_data->wdcsr)); in cpld_dump_regs()
78 printf("wdkick = 0x%02x\n", in_8(&cpld_data->wdkick)); in cpld_dump_regs()
79 printf("fancsr = 0x%02x\n", in_8(&cpld_data->fancsr)); in cpld_dump_regs()
[all …]
/external/u-boot/board/freescale/mpc8641hpcn/
Dmpc8641hpcn.c29 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard()
30 in_8(pixis_base + PIXIS_PVER)); in checkboard()
32 vboot = in_8(pixis_base + PIXIS_VBOOT); in checkboard()
175 go_bit = in_8(pixis_base + PIXIS_VCTL); in get_board_sys_clk()
178 rd_clks = in_8(pixis_base + PIXIS_VCFGEN0); in get_board_sys_clk()
189 i = in_8(pixis_base + PIXIS_AUX); in get_board_sys_clk()
191 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
193 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
/external/u-boot/board/freescale/corenet_ds/
Dcorenet_ds.c36 in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); in checkboard()
38 sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); in checkboard()
60 sw = in_8(&PIXIS_SW(5)); in checkboard()
68 sw = in_8(&PIXIS_SW(9)); in checkboard()
73 sw = in_8(&PIXIS_SW(3)); in checkboard()
140 sw = in_8(&PIXIS_SW(5)); in misc_init_r()
164 sw = in_8(&PIXIS_SW(3)); in misc_init_r()
/external/u-boot/board/freescale/mpc8568mds/
Dbcsr.c49 out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN); in reset_8568mds_uccs()
50 out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN); in reset_8568mds_uccs()
53 out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK | in reset_8568mds_uccs()
57 out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN); in reset_8568mds_uccs()
58 out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN); in reset_8568mds_uccs()
/external/u-boot/board/freescale/mpc8544ds/
Dmpc8544ds.c38 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard()
39 in_8(pixis_base + PIXIS_PVER)); in checkboard()
41 vboot = in_8(pixis_base + PIXIS_VBOOT); in checkboard()
182 go_bit = in_8(pixis_base + PIXIS_VCTL); in get_board_sys_clk()
185 rd_clks = in_8(pixis_base + PIXIS_VCFGEN0); in get_board_sys_clk()
196 i = in_8(pixis_base + PIXIS_AUX); in get_board_sys_clk()
198 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
200 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
/external/u-boot/board/freescale/common/
Dics307_clk.c134 in_8(&fpga_reg->sclk[0]), in get_board_sys_clk()
135 in_8(&fpga_reg->sclk[1]), in get_board_sys_clk()
136 in_8(&fpga_reg->sclk[2])); in get_board_sys_clk()
142 in_8(&fpga_reg->dclk[0]), in get_board_ddr_clk()
143 in_8(&fpga_reg->dclk[1]), in get_board_ddr_clk()
144 in_8(&fpga_reg->dclk[2])); in get_board_ddr_clk()
/external/u-boot/board/freescale/mpc8610hpcd/
Dmpc8610hpcd.c45 tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); in misc_init_r()
49 version = in_8(pixis_base + PIXIS_PVER); in misc_init_r()
51 tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); in misc_init_r()
84 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard()
85 in_8(pixis_base + PIXIS_PVER)); in checkboard()
93 switch (in_8(pixis_base + PIXIS_VBOOT) & 0xC0) { in checkboard()
285 i = in_8(pixis_base + PIXIS_SPD); in get_board_sys_clk()
Dmpc8610hpcd_diu.c47 temp = in_8(&pixis->brdcfg0); in platform_diu_init()
60 if (in_8(&pixis->ver) == 1) /* Board version */ in platform_diu_init()
/external/u-boot/board/freescale/ls1021atwr/
Dls1021atwr.c99 in_8(&cpld_data->cpld_ver) & VERSION_MASK, in cpld_show()
100 in_8(&cpld_data->cpld_ver_sub) & VERSION_MASK, in cpld_show()
101 in_8(&cpld_data->pcba_ver) & VERSION_MASK, in cpld_show()
102 in_8(&cpld_data->vbank) & BANK_MASK); in cpld_show()
106 in_8(&cpld_data->soft_mux_on)); in cpld_show()
108 in_8(&cpld_data->cfg_rcw_src1)); in cpld_show()
110 in_8(&cpld_data->cfg_rcw_src2)); in cpld_show()
112 in_8(&cpld_data->vbank)); in cpld_show()
114 in_8(&cpld_data->gpio)); in cpld_show()
116 in_8(&cpld_data->i2c3_ifc_mux)); in cpld_show()
[all …]
/external/u-boot/board/freescale/p1022ds/
Ddiu.c153 temp = in_8(&pixis->brdcfg1); in platform_diu_init()
186 px_brdcfg0 = in_8(lbc_lcs1_ba); in platform_diu_init()
188 in_8(lbc_lcs1_ba); in platform_diu_init()
226 in_8(lbc_lcs1_ba); in set_mux_to_lbc()
270 in_8(lbc_lcs1_ba); in set_mux_to_diu()
291 return in_8(lbc_lcs1_ba); in pixis_read()
295 return in_8(p + reg); in pixis_read()
315 in_8(lbc_lcs1_ba); in pixis_write()
Dp1022ds.c59 in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver)); in checkboard()
61 sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); in checkboard()
154 temp = in_8(&pixis->brdcfg1) & ~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK | in misc_init_r()
/external/u-boot/board/keymile/km83xx/
Dkm83xx_i2c.c39 in_8(&base->dr); in i2c_make_abort()
41 last = in_8(&base->dr); in i2c_make_abort()
51 last = in_8(&base->dr); in i2c_make_abort()
Dkm83xx.c124 return in_8(&base->bprth) & PIGGY_PRESENT; in piggy_present()
248 tmp_reg = in_8(&base->res1[0]) | 0x10; /* DIRECT3 register */ in last_stage_init()
250 tmp_reg = in_8(&base->gprt3) | 0x10; /* GP28 to high */ in last_stage_init()
277 u8 dip_switch = in_8((u8 *)&(base->mswitch)) & BFTICU_DIPSWITCH_MASK; in last_stage_init()
388 int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG); in post_hotkeys_pressed()
/external/u-boot/board/freescale/mpc8572ds/
Dmpc8572ds.c33 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard()
34 in_8(pixis_base + PIXIS_PVER)); in checkboard()
36 vboot = in_8(pixis_base + PIXIS_VBOOT); in checkboard()
/external/u-boot/board/keymile/kmp204x/
Dqrio.c157 ctrlh = in_8(qrio_base + CTRLH_OFF); in qrio_set_leds()
171 ctrll = in_8(qrio_base + CTRLL_OFF); in qrio_enable_app_buffer()
183 reason1 = in_8(qrio_base + REASON1_OFF); in qrio_cpuwd_flag()
198 rstcfg = in_8(qrio_base + RSTCFG_OFF); in qrio_uprstreq()
/external/u-boot/arch/arm/cpu/armv7/ls102xa/
Dls102xa_psci.c175 tmp = in_8(qixis_base + QIXIS_CTL_SYS); in ls1_deep_sleep()
181 tmp = in_8(qixis_base + QIXIS_PWR_CTL2); in ls1_deep_sleep()
186 tmp = in_8(qixis_base + QIXIS_RST_FORCE_3); in ls1_deep_sleep()
213 tmp = in_8(qixis_base + QIXIS_CTL_SYS); in ls1_sleep()
/external/u-boot/board/freescale/mpc8536ds/
Dmpc8536ds.c56 in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in checkboard()
57 in_8(pixis_base + PIXIS_PVER)); in checkboard()
59 vboot = in_8(pixis_base + PIXIS_VBOOT); in checkboard()
/external/u-boot/drivers/mtd/nand/
Dkmeter1_nand.c14 #define read_mode() in_8(CONFIG_NAND_MODE_REG)
16 #define read_data() in_8(CONFIG_NAND_DATA_REG)
/external/u-boot/board/freescale/p2041rdb/
Dcpld.c24 return in_8(p + reg); in __cpld_read()
85 printf("SW[2] = 0x%02x\n", in_8(&CPLD_SW(2))); in cpld_dump_regs()
Dp2041rdb.c47 sw = in_8(&CPLD_SW(2)) >> 2; in checkboard()
174 sw = in_8(&CPLD_SW(2)) >> 2; in misc_init_r()
/external/u-boot/arch/powerpc/include/asm/
Dio.h23 #define readb(addr) in_8((volatile u8 *)(addr))
50 #define inb(port) in_8((u8 *)((port)+_IO_BASE))
64 #define inb_p(port) in_8((u8 *)((port)+_IO_BASE))
166 static inline u8 in_8(const volatile unsigned char __iomem *addr) in in_8() function
/external/u-boot/board/freescale/p1_p2_rdb_pc/
Dp1_p2_rdb_pc.c229 in_8(&cpld_data->cpld_rev_major) & 0x0F, in checkboard()
230 in_8(&cpld_data->cpld_rev_minor) & 0x0F, in checkboard()
231 in_8(&cpld_data->pcba_rev) & 0x0F); in checkboard()
/external/u-boot/arch/xtensa/include/asm/
Dio.h89 # define in_8(addr) (*(u8 *)(addr)) macro
96 # define in_8(addr) (*(u8 *)(addr)) macro
/external/u-boot/arch/m68k/include/asm/
Dio.h26 #define readb(addr) in_8((volatile u8 *)(addr))
53 #define inb(port) in_8((u8 *)((port)+_IO_BASE))
161 static inline int in_8(volatile u8 * addr) in in_8() function
/external/u-boot/arch/m68k/cpu/mcf532x/
Dspeed.c74 return (FREF * in_8(&pll->pfdr)) / (BUSDIV * 4); in get_sys_clock()
159 mfd = in_8(&pll->pfdr); in clock_pll()

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