/external/webrtc/webrtc/modules/audio_processing/ns/ |
D | nsx_core.c | 303 static void UpdateNoiseEstimate(NoiseSuppressionFixedC* inst, int offset) { in UpdateNoiseEstimate() argument 311 tmp16 = WebRtcSpl_MaxValueW16(inst->noiseEstLogQuantile + offset, in UpdateNoiseEstimate() 312 inst->magnLen); in UpdateNoiseEstimate() 314 inst->qNoise = 14 - (int) WEBRTC_SPL_MUL_16_16_RSFT_WITH_ROUND( in UpdateNoiseEstimate() 316 for (i = 0; i < inst->magnLen; i++) { in UpdateNoiseEstimate() 319 tmp32no2 = kExp2Const * inst->noiseEstLogQuantile[offset + i]; in UpdateNoiseEstimate() 323 tmp16 += (int16_t) inst->qNoise; //shift to get result in Q(qNoise) in UpdateNoiseEstimate() 329 inst->noiseEstQuantile[i] = WebRtcSpl_SatW32ToW16(tmp32no1); in UpdateNoiseEstimate() 334 static void NoiseEstimationC(NoiseSuppressionFixedC* inst, in NoiseEstimationC() argument 346 tabind = inst->stages - inst->normData; in NoiseEstimationC() [all …]
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_program_alu.c | 197 static int is_dst_safe_to_reuse(struct rc_instruction *inst) in is_dst_safe_to_reuse() argument 199 const struct rc_opcode_info *info = rc_get_opcode_info(inst->U.I.Opcode); in is_dst_safe_to_reuse() 204 if (inst->U.I.DstReg.File != RC_FILE_TEMPORARY) in is_dst_safe_to_reuse() 208 if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY && in is_dst_safe_to_reuse() 209 inst->U.I.SrcReg[i].Index == inst->U.I.DstReg.Index) in is_dst_safe_to_reuse() 217 struct rc_instruction *inst) in try_to_reuse_dst() argument 221 if (is_dst_safe_to_reuse(inst)) in try_to_reuse_dst() 222 tmp = inst->U.I.DstReg.Index; in try_to_reuse_dst() 226 return dstregtmpmask(tmp, inst->U.I.DstReg.WriteMask); in try_to_reuse_dst() 230 struct rc_instruction* inst) in transform_ABS() argument [all …]
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D | r500_fragprog.c | 65 struct rc_instruction * inst; in r500_transform_IF() local 85 for (inst = writer->Inst; inst != inst_if; inst = inst->Next) { in r500_transform_IF() 87 rc_get_opcode_info(inst->U.I.Opcode); in r500_transform_IF() 374 uint32_t inst; in r500FragmentProgramDump() local 380 inst0 = inst = code->inst[n].inst0; in r500FragmentProgramDump() 381 fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst); in r500FragmentProgramDump() 382 switch(inst & 0x3) { in r500FragmentProgramDump() 389 inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "", in r500FragmentProgramDump() 390 inst & R500_INST_LAST ? "LAST" : "", in r500FragmentProgramDump() 391 inst & R500_INST_NOP ? "NOP" : "", in r500FragmentProgramDump() [all …]
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D | r500_fragprog_emit.c | 159 static unsigned int translate_arg_rgb(struct rc_pair_instruction *inst, int arg) in translate_arg_rgb() argument 161 unsigned int t = inst->RGB.Arg[arg].Source; in translate_arg_rgb() 163 t |= inst->RGB.Arg[arg].Negate << 11; in translate_arg_rgb() 164 t |= inst->RGB.Arg[arg].Abs << 12; in translate_arg_rgb() 167 t |= fix_hw_swizzle(GET_SWZ(inst->RGB.Arg[arg].Swizzle, comp)) << (3*comp + 2); in translate_arg_rgb() 172 static unsigned int translate_arg_alpha(struct rc_pair_instruction *inst, int i) in translate_arg_alpha() argument 174 unsigned int t = inst->Alpha.Arg[i].Source; in translate_arg_alpha() 175 t |= fix_hw_swizzle(GET_SWZ(inst->Alpha.Arg[i].Swizzle, 0)) << 2; in translate_arg_alpha() 176 t |= inst->Alpha.Arg[i].Negate << 5; in translate_arg_alpha() 177 t |= inst->Alpha.Arg[i].Abs << 6; in translate_arg_alpha() [all …]
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D | radeon_pair_translate.c | 38 static void final_rewrite(struct rc_sub_instruction *inst) in final_rewrite() argument 42 switch(inst->Opcode) { in final_rewrite() 44 inst->SrcReg[2] = inst->SrcReg[1]; in final_rewrite() 45 inst->SrcReg[1].File = RC_FILE_NONE; in final_rewrite() 46 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111; in final_rewrite() 47 inst->SrcReg[1].Negate = RC_MASK_NONE; in final_rewrite() 48 inst->Opcode = RC_OPCODE_MAD; in final_rewrite() 51 tmp = inst->SrcReg[2]; in final_rewrite() 52 inst->SrcReg[2] = inst->SrcReg[0]; in final_rewrite() 53 inst->SrcReg[0] = tmp; in final_rewrite() [all …]
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/external/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_opt_algebraic.c | 41 dump_from(struct vc4_compile *c, struct qinst *inst) in dump_from() argument 47 qir_dump_inst(c, inst); in dump_from() 52 dump_to(struct vc4_compile *c, struct qinst *inst) in dump_to() argument 58 qir_dump_inst(c, inst); in dump_to() 94 replace_with_mov(struct vc4_compile *c, struct qinst *inst, struct qreg arg) in replace_with_mov() argument 96 dump_from(c, inst); in replace_with_mov() 98 inst->src[0] = arg; in replace_with_mov() 99 if (qir_has_implicit_tex_uniform(inst)) in replace_with_mov() 100 inst->src[1] = inst->src[qir_get_tex_uniform_src(inst)]; in replace_with_mov() 102 if (qir_is_mul(inst)) in replace_with_mov() [all …]
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D | vc4_qpu.c | 33 set_src_raddr(uint64_t inst, struct qpu_reg src) in set_src_raddr() argument 36 assert(QPU_GET_FIELD(inst, QPU_RADDR_A) == QPU_R_NOP || in set_src_raddr() 37 QPU_GET_FIELD(inst, QPU_RADDR_A) == src.addr); in set_src_raddr() 38 return QPU_UPDATE_FIELD(inst, src.addr, QPU_RADDR_A); in set_src_raddr() 42 assert((QPU_GET_FIELD(inst, QPU_RADDR_B) == QPU_R_NOP || in set_src_raddr() 43 QPU_GET_FIELD(inst, QPU_RADDR_B) == src.addr) && in set_src_raddr() 44 QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_SMALL_IMM); in set_src_raddr() 45 return QPU_UPDATE_FIELD(inst, src.addr, QPU_RADDR_B); in set_src_raddr() 49 if (QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_SMALL_IMM) { in set_src_raddr() 50 assert(QPU_GET_FIELD(inst, QPU_RADDR_B) == src.addr); in set_src_raddr() [all …]
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D | vc4_qpu_validate.c | 28 fail_instr(uint64_t inst, const char *msg) in fail_instr() argument 31 vc4_qpu_disasm(&inst, 1); in fail_instr() 37 writes_reg(uint64_t inst, uint32_t w) in writes_reg() argument 39 return (QPU_GET_FIELD(inst, QPU_WADDR_ADD) == w || in writes_reg() 40 QPU_GET_FIELD(inst, QPU_WADDR_MUL) == w); in writes_reg() 44 _reads_reg(uint64_t inst, uint32_t r, bool ignore_a, bool ignore_b) in _reads_reg() argument 49 { QPU_GET_FIELD(inst, QPU_ADD_A) }, in _reads_reg() 50 { QPU_GET_FIELD(inst, QPU_ADD_B) }, in _reads_reg() 51 { QPU_GET_FIELD(inst, QPU_MUL_A) }, in _reads_reg() 52 { QPU_GET_FIELD(inst, QPU_MUL_B) }, in _reads_reg() [all …]
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/external/mesa3d/src/intel/compiler/ |
D | brw_vec4_copy_propagation.cpp | 44 is_direct_copy(vec4_instruction *inst) in is_direct_copy() argument 46 return (inst->opcode == BRW_OPCODE_MOV && in is_direct_copy() 47 !inst->predicate && in is_direct_copy() 48 inst->dst.file == VGRF && in is_direct_copy() 49 inst->dst.offset % REG_SIZE == 0 && in is_direct_copy() 50 !inst->dst.reladdr && in is_direct_copy() 51 !inst->src[0].reladdr && in is_direct_copy() 52 (inst->dst.type == inst->src[0].type || in is_direct_copy() 53 (inst->dst.type == BRW_REGISTER_TYPE_F && in is_direct_copy() 54 inst->src[0].type == BRW_REGISTER_TYPE_VF))); in is_direct_copy() [all …]
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D | brw_vec4.cpp | 316 vec4_visitor::implied_mrf_writes(vec4_instruction *inst) in implied_mrf_writes() argument 318 if (inst->mlen == 0 || inst->is_send_from_grf()) in implied_mrf_writes() 321 switch (inst->opcode) { in implied_mrf_writes() 365 return inst->header_size; in implied_mrf_writes() 393 foreach_inst_in_block_safe(vec4_instruction, inst, block) { in opt_vector_float() 402 if (inst->opcode == BRW_OPCODE_MOV && in opt_vector_float() 403 inst->src[0].file == IMM && in opt_vector_float() 404 inst->predicate == BRW_PREDICATE_NONE && in opt_vector_float() 405 inst->dst.writemask != WRITEMASK_XYZW && in opt_vector_float() 406 type_sz(inst->src[0].type) < 8 && in opt_vector_float() [all …]
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D | brw_schedule_instructions.cpp | 65 schedule_node(backend_instruction *inst, instruction_scheduler *sched); 69 backend_instruction *inst; member in schedule_node 123 switch (inst->opcode) { in set_latency_gen4() 158 switch (inst->opcode) { in set_latency_gen7() 499 virtual int issue_time(backend_instruction *inst) = 0; 501 virtual void count_reads_remaining(backend_instruction *inst) = 0; 503 virtual void update_register_pressure(backend_instruction *inst) = 0; 504 virtual int get_register_pressure_benefit(backend_instruction *inst) = 0; 571 bool is_compressed(fs_inst *inst); 573 int issue_time(backend_instruction *inst); [all …]
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D | brw_disasm.c | 702 dest(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) in dest() argument 704 enum brw_reg_type type = brw_inst_dst_type(devinfo, inst); in dest() 708 if (brw_inst_access_mode(devinfo, inst) == BRW_ALIGN_1) { in dest() 709 if (brw_inst_dst_address_mode(devinfo, inst) == BRW_ADDRESS_DIRECT) { in dest() 710 err |= reg(file, brw_inst_dst_reg_file(devinfo, inst), in dest() 711 brw_inst_dst_da_reg_nr(devinfo, inst)); in dest() 714 if (brw_inst_dst_da1_subreg_nr(devinfo, inst)) in dest() 715 format(file, ".%"PRIu64, brw_inst_dst_da1_subreg_nr(devinfo, inst) / in dest() 719 brw_inst_dst_hstride(devinfo, inst), NULL); in dest() 724 if (brw_inst_dst_ia_subreg_nr(devinfo, inst)) in dest() [all …]
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D | brw_fs.cpp | 46 const fs_inst *inst); 190 fs_inst *inst = bld.emit(FS_OPCODE_VARYING_PULL_CONSTANT_LOAD_LOGICAL, in VARYING_PULL_CONSTANT_LOAD() local 192 inst->size_written = 4 * vec4_result.component_size(inst->exec_size); in VARYING_PULL_CONSTANT_LOAD() 228 fs_inst::equals(fs_inst *inst) const in equals() 230 return (opcode == inst->opcode && in equals() 231 dst.equals(inst->dst) && in equals() 232 src[0].equals(inst->src[0]) && in equals() 233 src[1].equals(inst->src[1]) && in equals() 234 src[2].equals(inst->src[2]) && in equals() 235 saturate == inst->saturate && in equals() [all …]
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D | brw_eu_validate.c | 69 struct string __msg = func(devinfo, inst, ##args); \ 80 inst_is_send(const struct gen_device_info *devinfo, const brw_inst *inst) in inst_is_send() argument 82 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 106 inst_is_raw_move(const struct gen_device_info *devinfo, const brw_inst *inst) in inst_is_raw_move() argument 108 unsigned dst_type = signed_type(brw_inst_dst_type(devinfo, inst)); in inst_is_raw_move() 109 unsigned src_type = signed_type(brw_inst_src0_type(devinfo, inst)); in inst_is_raw_move() 111 if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) { in inst_is_raw_move() 113 if (brw_inst_src0_type(devinfo, inst) == BRW_REGISTER_TYPE_VF || in inst_is_raw_move() 114 brw_inst_src0_type(devinfo, inst) == BRW_REGISTER_TYPE_UV || in inst_is_raw_move() 115 brw_inst_src0_type(devinfo, inst) == BRW_REGISTER_TYPE_V) { in inst_is_raw_move() [all …]
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/external/swiftshader/third_party/SPIRV-Tools/source/val/ |
D | validate_image.cpp | 90 const Instruction* inst = _.FindDef(id); in GetImageTypeInfo() local 91 assert(inst); in GetImageTypeInfo() 93 if (inst->opcode() == SpvOpTypeSampledImage) { in GetImageTypeInfo() 94 inst = _.FindDef(inst->word(2)); in GetImageTypeInfo() 95 assert(inst); in GetImageTypeInfo() 98 if (inst->opcode() != SpvOpTypeImage) return false; in GetImageTypeInfo() 100 const size_t num_words = inst->words().size(); in GetImageTypeInfo() 103 info->sampled_type = inst->word(2); in GetImageTypeInfo() 104 info->dim = static_cast<SpvDim>(inst->word(3)); in GetImageTypeInfo() 105 info->depth = inst->word(4); in GetImageTypeInfo() [all …]
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D | validate_extensions.cpp | 47 spv_result_t ValidateExtension(ValidationState_t& _, const Instruction* inst) { in ValidateExtension() argument 49 std::string extension = GetExtensionString(&(inst->c_inst())); in ValidateExtension() 52 return _.diag(SPV_ERROR_INVALID_DATA, inst) in ValidateExtension() 63 const Instruction* inst) { in ValidateExtInstImport() argument 67 inst->words().data() + inst->operands()[name_id].offset)); in ValidateExtInstImport() 69 return _.diag(SPV_ERROR_INVALID_DATA, inst) in ValidateExtInstImport() 78 spv_result_t ValidateExtInst(ValidationState_t& _, const Instruction* inst) { in ValidateExtInst() argument 79 const uint32_t result_type = inst->type_id(); in ValidateExtInst() 80 const uint32_t num_operands = static_cast<uint32_t>(inst->operands().size()); in ValidateExtInst() 82 const uint32_t ext_inst_set = inst->word(3); in ValidateExtInst() [all …]
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/external/deqp-deps/SPIRV-Tools/source/val/ |
D | validate_image.cpp | 90 const Instruction* inst = _.FindDef(id); in GetImageTypeInfo() local 91 assert(inst); in GetImageTypeInfo() 93 if (inst->opcode() == SpvOpTypeSampledImage) { in GetImageTypeInfo() 94 inst = _.FindDef(inst->word(2)); in GetImageTypeInfo() 95 assert(inst); in GetImageTypeInfo() 98 if (inst->opcode() != SpvOpTypeImage) return false; in GetImageTypeInfo() 100 const size_t num_words = inst->words().size(); in GetImageTypeInfo() 103 info->sampled_type = inst->word(2); in GetImageTypeInfo() 104 info->dim = static_cast<SpvDim>(inst->word(3)); in GetImageTypeInfo() 105 info->depth = inst->word(4); in GetImageTypeInfo() [all …]
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D | validate_extensions.cpp | 47 spv_result_t ValidateExtension(ValidationState_t& _, const Instruction* inst) { in ValidateExtension() argument 49 std::string extension = GetExtensionString(&(inst->c_inst())); in ValidateExtension() 52 return _.diag(SPV_ERROR_INVALID_DATA, inst) in ValidateExtension() 63 const Instruction* inst) { in ValidateExtInstImport() argument 67 inst->words().data() + inst->operands()[name_id].offset)); in ValidateExtInstImport() 69 return _.diag(SPV_ERROR_INVALID_DATA, inst) in ValidateExtInstImport() 78 spv_result_t ValidateExtInst(ValidationState_t& _, const Instruction* inst) { in ValidateExtInst() argument 79 const uint32_t result_type = inst->type_id(); in ValidateExtInst() 80 const uint32_t num_operands = static_cast<uint32_t>(inst->operands().size()); in ValidateExtInst() 82 const uint32_t ext_inst_set = inst->word(3); in ValidateExtInst() [all …]
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/external/webrtc/webrtc/modules/audio_coding/codecs/cng/ |
D | webrtc_cng.c | 148 WebRtcCngEncoder* inst = (WebRtcCngEncoder*) cng_inst; in WebRtcCng_InitEnc() local 149 memset(inst, 0, sizeof(WebRtcCngEncoder)); in WebRtcCng_InitEnc() 153 inst->errorcode = CNG_DISALLOWED_LPC_ORDER; in WebRtcCng_InitEnc() 157 inst->enc_sampfreq = fs; in WebRtcCng_InitEnc() 158 inst->enc_interval = interval; in WebRtcCng_InitEnc() 159 inst->enc_nrOfCoefs = quality; in WebRtcCng_InitEnc() 160 inst->enc_msSinceSID = 0; in WebRtcCng_InitEnc() 161 inst->enc_seed = 7777; /* For debugging only. */ in WebRtcCng_InitEnc() 162 inst->enc_Energy = 0; in WebRtcCng_InitEnc() 164 inst->enc_reflCoefs[i] = 0; in WebRtcCng_InitEnc() [all …]
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/external/mesa3d/src/mesa/program/ |
D | programopt.c | 254 struct prog_instruction *newInst, *inst; in _mesa_append_fog_code() local 296 inst = newInst; in _mesa_append_fog_code() 298 if (inst->Opcode == OPCODE_END) in _mesa_append_fog_code() 300 if (inst->DstReg.File == PROGRAM_OUTPUT && in _mesa_append_fog_code() 301 inst->DstReg.Index == FRAG_RESULT_COLOR) { in _mesa_append_fog_code() 303 inst->DstReg.File = PROGRAM_TEMPORARY; in _mesa_append_fog_code() 304 inst->DstReg.Index = colorTemp; in _mesa_append_fog_code() 305 inst->Saturate = saturate; in _mesa_append_fog_code() 308 inst++; in _mesa_append_fog_code() 310 assert(inst->Opcode == OPCODE_END); /* we'll overwrite this inst */ in _mesa_append_fog_code() [all …]
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/external/webrtc/webrtc/modules/audio_coding/codecs/opus/ |
D | opus_interface.c | 44 int16_t WebRtcOpus_EncoderCreate(OpusEncInst** inst, in WebRtcOpus_EncoderCreate() argument 48 if (!inst) in WebRtcOpus_EncoderCreate() 80 *inst = state; in WebRtcOpus_EncoderCreate() 84 int16_t WebRtcOpus_EncoderFree(OpusEncInst* inst) { in WebRtcOpus_EncoderFree() argument 85 if (inst) { in WebRtcOpus_EncoderFree() 86 opus_encoder_destroy(inst->encoder); in WebRtcOpus_EncoderFree() 87 free(inst->zero_counts); in WebRtcOpus_EncoderFree() 88 free(inst); in WebRtcOpus_EncoderFree() 95 int WebRtcOpus_Encode(OpusEncInst* inst, in WebRtcOpus_Encode() argument 110 const size_t channels = inst->channels; in WebRtcOpus_Encode() [all …]
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_transform.h | 49 struct tgsi_full_instruction *inst); 79 const struct tgsi_full_instruction *inst); 277 struct tgsi_full_instruction inst; in tgsi_transform_op1_inst() local 279 inst = tgsi_default_full_instruction(); in tgsi_transform_op1_inst() 280 inst.Instruction.Opcode = opcode; in tgsi_transform_op1_inst() 281 inst.Instruction.NumDstRegs = 1; in tgsi_transform_op1_inst() 282 inst.Dst[0].Register.File = dst_file, in tgsi_transform_op1_inst() 283 inst.Dst[0].Register.Index = dst_index; in tgsi_transform_op1_inst() 284 inst.Dst[0].Register.WriteMask = dst_writemask; in tgsi_transform_op1_inst() 285 inst.Instruction.NumSrcRegs = 1; in tgsi_transform_op1_inst() [all …]
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/external/pcre/dist2/src/sljit/ |
D | sljitNativeX86_common.c | 277 #define INC_SIZE(s) (*inst++ = (s), compiler->size += (s)) 279 #define PUSH_REG(r) (*inst++ = (PUSH_r + (r))) 280 #define POP_REG(r) (*inst++ = (POP_r + (r))) 281 #define RET() (*inst++ = (RET_near)) 282 #define RET_I16(n) (*inst++ = (RET_i16), *inst++ = n, *inst++ = 0) 284 #define MOV_RM(mod, reg, rm) (*inst++ = (MOV_r_rm), *inst++ = (mod) << 6 | (reg) << 3 | (rm)) 682 sljit_u8* inst; in emit_mov() local 687 inst = emit_x86_instruction(compiler, 1, src, 0, dst, dstw); in emit_mov() 688 FAIL_IF(!inst); in emit_mov() 689 *inst = MOV_rm_r; in emit_mov() [all …]
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/external/webrtc/webrtc/modules/audio_coding/codecs/isac/main/source/ |
D | isac_float_type.h | 21 static inline int16_t Control(instance_type* inst, in Control() 24 return WebRtcIsac_Control(inst, rate, framesize); in Control() 26 static inline int16_t ControlBwe(instance_type* inst, in ControlBwe() 30 return WebRtcIsac_ControlBwe(inst, rate_bps, frame_size_ms, in ControlBwe() 33 static inline int16_t Create(instance_type** inst) { in Create() 34 return WebRtcIsac_Create(inst); in Create() 36 static inline int DecodeInternal(instance_type* inst, in DecodeInternal() 41 return WebRtcIsac_Decode(inst, encoded, len, decoded, speech_type); in DecodeInternal() 43 static inline size_t DecodePlc(instance_type* inst, in DecodePlc() 46 return WebRtcIsac_DecodePlc(inst, decoded, num_lost_frames); in DecodePlc() [all …]
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/external/mesa3d/src/gallium/drivers/etnaviv/ |
D | etnaviv_asm.c | 36 check_uniforms(const struct etna_inst *inst) in check_uniforms() argument 43 const struct etna_inst_src *src = &inst->src[i]; in check_uniforms() 62 etna_assemble(uint32_t *out, const struct etna_inst *inst) in etna_assemble() argument 65 if (inst->imm && inst->src[2].use) in etna_assemble() 68 if (!check_uniforms(inst)) in etna_assemble() 71 assert(!(inst->opcode&~0x7f)); in etna_assemble() 73 out[0] = VIV_ISA_WORD_0_OPCODE(inst->opcode & 0x3f) | in etna_assemble() 74 VIV_ISA_WORD_0_COND(inst->cond) | in etna_assemble() 75 COND(inst->sat, VIV_ISA_WORD_0_SAT) | in etna_assemble() 76 COND(inst->dst.use, VIV_ISA_WORD_0_DST_USE) | in etna_assemble() [all …]
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