| /external/swiftshader/third_party/SPIRV-Tools/source/ |
| D | binary.cpp | 101 spv_result_t parseOperand(size_t inst_offset, spv_parsed_instruction_t* inst,
118 void recordNumberType(size_t inst_offset,
139 spv_result_t exhaustedInputDiagnostic(size_t inst_offset, SpvOp opcode, in exhaustedInputDiagnostic() argument
143 << inst_offset in exhaustedInputDiagnostic()
147 << _.word_index - inst_offset << "."; in exhaustedInputDiagnostic()
306 const size_t inst_offset = _.word_index; in parseInstruction() local
321 while (_.word_index < inst_offset + inst_word_count) { in parseInstruction()
322 const uint16_t inst_word_index = uint16_t(_.word_index - inst_offset); in parseInstruction()
325 << " starting at word " << inst_offset in parseInstruction()
336 parseOperand(inst_offset, &inst, type, &_.endian_converted_words, in parseInstruction()
[all …]
|
| /external/deqp-deps/SPIRV-Tools/source/ |
| D | binary.cpp | 101 spv_result_t parseOperand(size_t inst_offset, spv_parsed_instruction_t* inst,
118 void recordNumberType(size_t inst_offset,
139 spv_result_t exhaustedInputDiagnostic(size_t inst_offset, SpvOp opcode, in exhaustedInputDiagnostic() argument
143 << inst_offset in exhaustedInputDiagnostic()
147 << _.word_index - inst_offset << "."; in exhaustedInputDiagnostic()
302 const size_t inst_offset = _.word_index; in parseInstruction() local
317 while (_.word_index < inst_offset + inst_word_count) { in parseInstruction()
318 const uint16_t inst_word_index = uint16_t(_.word_index - inst_offset); in parseInstruction()
321 << " starting at word " << inst_offset in parseInstruction()
332 parseOperand(inst_offset, &inst, type, &_.endian_converted_words, in parseInstruction()
[all …]
|
| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nvfx_fragprog.c | 34 unsigned inst_offset; member
93 uint32_t *hw = &fp->insn[fpc->inst_offset]; in emit_src()
111 hw = &fp->insn[fpc->inst_offset]; in emit_src()
115 memcpy(&fp->insn[fpc->inst_offset + 4], in emit_src()
124 hw = &fp->insn[fpc->inst_offset]; in emit_src()
134 fpd->offset = fpc->inst_offset + 4; in emit_src()
166 uint32_t *hw = &fp->insn[fpc->inst_offset]; in emit_dst()
197 fpc->inst_offset = fp->insn_len; in nvfx_fp_emit()
200 hw = &fp->insn[fpc->inst_offset]; in nvfx_fp_emit()
249 fpc->inst_offset = fpc->fp->insn_len; in nv40_fp_if()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIIntrinsics.td | 27 llvm_i32_ty, // inst_offset(imm)
43 llvm_i32_ty, // inst_offset(imm)
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIIntrinsics.td | 29 llvm_i32_ty, // inst_offset(imm)
45 llvm_i32_ty, // inst_offset(imm)
|
| D | SIInstructions.td | 3302 i32:$soffset, imm:$inst_offset, imm:$dfmt,
3306 $vdata, (as_i16imm $inst_offset), (as_i1imm $offen), (as_i1imm $idxen),
|
| D | SIInstrInfo.td | 118 SDTCisVT<5, i32>, // inst_offset(imm)
|
| /external/mesa3d/src/amd/common/ |
| D | ac_llvm_build.h | 204 unsigned inst_offset,
216 unsigned inst_offset,
|
| D | ac_llvm_build.c | 843 unsigned inst_offset, in ac_build_buffer_store_dword() argument
866 soffset, inst_offset, glc, slc, in ac_build_buffer_store_dword()
869 soffset, inst_offset + 8, in ac_build_buffer_store_dword()
880 if (inst_offset) in ac_build_buffer_store_dword()
882 LLVMConstInt(ctx->i32, inst_offset, 0), ""); in ac_build_buffer_store_dword()
920 LLVMConstInt(ctx->i32, inst_offset, 0), in ac_build_buffer_store_dword()
931 assert(voffset || inst_offset < (1 << 12)); in ac_build_buffer_store_dword()
951 unsigned inst_offset, in ac_build_buffer_load() argument
957 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0); in ac_build_buffer_load()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
| D | flat-gfx9.s | 34 flat_atomic_add v[3:4], v5 inst_offset:8 slc
|