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Searched refs:instr0 (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DMergeFunctions.rst399 instr0 i32 %LV ; left side, function FL
400 instr0 i32 %RV ; right side, function FR
415 instr0 i32 %pf0 instr1 i32 %pf1 instr2 i32 123
421 instr0 i32 %pg0 instr1 i32 %pg0 instr2 i32 123
427 Instructions with opcode "*instr0*" would be *equal*, since their types and
/external/llvm/docs/
DMergeFunctions.rst399 instr0 i32 %LV ; left side, function FL
400 instr0 i32 %RV ; right side, function FR
415 instr0 i32 %pf0 instr1 i32 %pf1 instr2 i32 123
421 instr0 i32 %pg0 instr1 i32 %pg0 instr2 i32 123
427 Instructions with opcode "*instr0*" would be *equal*, since their types and
/external/v8/src/mips64/
Dassembler-mips64.cc4313 Instr instr0 = instr_at(pc); in target_address_at() local
4319 if ((GetOpcodeField(instr0) == LUI) && (GetOpcodeField(instr1) == ORI) && in target_address_at()
4323 ((uint64_t)(GetImmediate16(instr0)) << 32) | in target_address_at()
4370 Instr instr0 = instr_at(pc); in set_target_value_at() local
4372 DCHECK((GetOpcodeField(instr0) == LUI && GetOpcodeField(instr1) == ORI && in set_target_value_at()