Home
last modified time | relevance | path

Searched refs:intr_name (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_tgsi_alu.c464 lp_build_intrinsic(ctx->ac.builder, action->intr_name, in build_tgsi_intrinsic_nomem()
720 bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.bitreverse.i32"; in si_shader_context_init_alu()
722 bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32"; in si_shader_context_init_alu()
725 bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32"; in si_shader_context_init_alu()
727 bld_base->op_actions[TGSI_OPCODE_DABS].intr_name = "llvm.fabs.f64"; in si_shader_context_init_alu()
729 bld_base->op_actions[TGSI_OPCODE_DCEIL].intr_name = "llvm.ceil.f64"; in si_shader_context_init_alu()
731 bld_base->op_actions[TGSI_OPCODE_DFLR].intr_name = "llvm.floor.f64"; in si_shader_context_init_alu()
733 bld_base->op_actions[TGSI_OPCODE_DFMA].intr_name = "llvm.fma.f64"; in si_shader_context_init_alu()
738 bld_base->op_actions[TGSI_OPCODE_DROUND].intr_name = "llvm.rint.f64"; in si_shader_context_init_alu()
745 bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name = "llvm.amdgcn.rsq.f64"; in si_shader_context_init_alu()
[all …]
Dsi_shader_tgsi_mem.c943 "llvm.amdgcn.buffer.atomic.%s", action->intr_name); in atomic_emit()
956 action->intr_name, coords_type); in atomic_emit()
1979 bld_base->op_actions[TGSI_OPCODE_ATOMUADD].intr_name = "add"; in si_shader_context_init_mem()
1981 bld_base->op_actions[TGSI_OPCODE_ATOMXCHG].intr_name = "swap"; in si_shader_context_init_mem()
1983 bld_base->op_actions[TGSI_OPCODE_ATOMCAS].intr_name = "cmpswap"; in si_shader_context_init_mem()
1985 bld_base->op_actions[TGSI_OPCODE_ATOMAND].intr_name = "and"; in si_shader_context_init_mem()
1987 bld_base->op_actions[TGSI_OPCODE_ATOMOR].intr_name = "or"; in si_shader_context_init_mem()
1989 bld_base->op_actions[TGSI_OPCODE_ATOMXOR].intr_name = "xor"; in si_shader_context_init_mem()
1991 bld_base->op_actions[TGSI_OPCODE_ATOMUMIN].intr_name = "umin"; in si_shader_context_init_mem()
1993 bld_base->op_actions[TGSI_OPCODE_ATOMUMAX].intr_name = "umax"; in si_shader_context_init_mem()
[all …]
Dsi_shader.c4278 ac_build_intrinsic(&ctx->ac, action->intr_name, in read_lane_emit()
5912 bld_base->op_actions[TGSI_OPCODE_READ_FIRST].intr_name = "llvm.amdgcn.readfirstlane"; in si_init_shader_ctx()
5914 bld_base->op_actions[TGSI_OPCODE_READ_INVOC].intr_name = "llvm.amdgcn.readlane"; in si_init_shader_ctx()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_action.h128 const char * intr_name; member
Dlp_bld_tgsi.c106 base->gallivm->builder, action->intr_name, in lp_build_tgsi_intrinsic()
/external/mesa3d/src/amd/common/
Dac_llvm_build.c1202 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.SI.sendmsg" : "llvm.amdgcn.s.sendmsg"; in ac_build_sendmsg() local
1205 ac_build_intrinsic(ctx, intr_name, ctx->voidt, args, 2, 0); in ac_build_sendmsg()
1213 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" : in ac_build_imsb() local
1215 LLVMValueRef msb = ac_build_intrinsic(ctx, intr_name, in ac_build_imsb()
1353 char intr_name[128], type[64]; in ac_build_image_opcode() local
1402 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32", in ac_build_image_opcode()
1413 ac_build_intrinsic(ctx, intr_name, in ac_build_image_opcode()
1466 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.%s", in ac_build_image_opcode()
1476 return ac_build_intrinsic(ctx, intr_name, in ac_build_image_opcode()
Dac_nir_to_llvm.c4329 const char *intr_name; in visit_intrinsic() local
4332 intr_name = "llvm.amdgcn.readlane"; in visit_intrinsic()
4338 intr_name = "llvm.amdgcn.readfirstlane"; in visit_intrinsic()
4346 result = ac_build_intrinsic(&ctx->ac, intr_name, in visit_intrinsic()