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Searched refs:ioaddr (Results 1 – 25 of 40) sorted by relevance

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/external/u-boot/drivers/ata/
Dsata_sil3114.c32 static u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits,
34 static u8 sata_chk_status (struct sata_ioports *ioaddr, u8 usealtstatus);
41 static void output_data (struct sata_ioports *ioaddr, u16 * sect_buf, int words) in output_data() argument
44 __raw_writew (*sect_buf++, (void *)ioaddr->data_addr); in output_data()
48 static int input_data (struct sata_ioports *ioaddr, u16 * sect_buf, int words) in input_data() argument
51 *sect_buf++ = __raw_readw ((void *)ioaddr->data_addr); in input_data()
63 writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
65 writeb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
67 writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
78 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 300, 0); in sata_bus_softreset()
[all …]
/external/u-boot/drivers/net/
Duli526x.c80 #define SROM_CLK_WRITE(data, ioaddr) do { \ argument
81 outl(data|CR9_SROM_READ|CR9_SRCS, ioaddr); \
83 outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SRCLK, ioaddr); \
85 outl(data|CR9_SROM_READ|CR9_SRCS, ioaddr); \
107 long ioaddr; /* I/O base address */ member
241 db->ioaddr = dev->iobase; in uli526x_initialize()
294 __FUNCTION__, db->ioaddr); in uli526x_init_one()
309 ((u16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db->ioaddr, in uli526x_init_one()
342 if (!((inl(db->ioaddr + DCR12)) & 0x8)) { in uli526x_disable()
344 outl(ULI526X_RESET, db->ioaddr + DCR0); in uli526x_disable()
[all …]
Drtl8139.c177 static int ioaddr; variable
258 ioaddr = dev->iobase; in rtl8139_probe()
261 outb(0x00, ioaddr + Config1); in rtl8139_probe()
269 if (inb(ioaddr + MediaStatus) & MSRLinkFail) { in rtl8139_probe()
304 long ee_addr = ioaddr + Cfg9346; in read_eeprom()
348 outl(rtl8139_rx_config | rx_mode, ioaddr + RxConfig); in set_rx_mode()
350 outl(mc_filter[0], ioaddr + MAR0 + 0); in set_rx_mode()
351 outl(mc_filter[1], ioaddr + MAR0 + 4); in set_rx_mode()
358 outb(CmdReset, ioaddr + ChipCmd); in rtl_reset()
365 if ((inb(ioaddr + ChipCmd) & CmdReset) == 0) break; in rtl_reset()
[all …]
Ddc2114x.c146 static int do_eeprom_cmd(struct eth_device *dev, u_long ioaddr,int cmd,int cmd_len);
147 static int do_read_eeprom(struct eth_device *dev,u_long ioaddr,int location,int addr_len);
150 static int write_srom(struct eth_device *dev, u_long ioaddr, int index, int new_value);
154 static int read_srom(struct eth_device *dev, u_long ioaddr, int index);
545 static int do_read_eeprom(struct eth_device *dev, u_long ioaddr, int location, int addr_len) in do_read_eeprom() argument
551 sendto_srom(dev, SROM_RD | SROM_SR, ioaddr); in do_read_eeprom()
552 sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr); in do_read_eeprom()
561 sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval, ioaddr); in do_read_eeprom()
563 sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval | DT_CLK, ioaddr); in do_read_eeprom()
566 printf("%X", getfrom_srom(dev, ioaddr) & 15); in do_read_eeprom()
[all …]
Drtl8169.c61 static unsigned long ioaddr; variable
98 #define RTL_W8(reg, val8) writeb((val8), ioaddr + (reg))
99 #define RTL_W16(reg, val16) writew((val16), ioaddr + (reg))
100 #define RTL_W32(reg, val32) writel((val32), ioaddr + (reg))
101 #define RTL_R8(reg) readb(ioaddr + (reg))
102 #define RTL_R16(reg) readw(ioaddr + (reg))
103 #define RTL_R32(reg) readl(ioaddr + (reg))
395 ioaddr = dev_iobase; in rtl8169_init_board()
529 ioaddr = dev_iobase; in rtl_recv_common()
623 ioaddr = dev_iobase; in rtl_send_common()
[all …]
Dpic32_mdio.c103 int pic32_mdio_init(const char *name, ulong ioaddr) in pic32_mdio_init() argument
117 bus->priv = (void *)ioaddr; in pic32_mdio_init()
/external/u-boot/drivers/mmc/
Dbcm2835_sdhost.c160 void __iomem *ioaddr; member
185 dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); in bcm2835_dumpregs()
186 dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); in bcm2835_dumpregs()
187 dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); in bcm2835_dumpregs()
188 dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); in bcm2835_dumpregs()
189 dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0)); in bcm2835_dumpregs()
190 dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1)); in bcm2835_dumpregs()
191 dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2)); in bcm2835_dumpregs()
192 dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3)); in bcm2835_dumpregs()
193 dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS)); in bcm2835_dumpregs()
[all …]
Dsti_sdhci.c51 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_1); in sti_mmc_core_config()
55 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2); in sti_mmc_core_config()
57 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3); in sti_mmc_core_config()
60 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2); in sti_mmc_core_config()
62 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3); in sti_mmc_core_config()
65 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4); in sti_mmc_core_config()
118 host->ioaddr = (void *)devfdt_get_addr(dev); in sti_sdhci_ofdata_to_platdata()
Dtangier_sdhci.c20 void __iomem *ioaddr; member
42 plat->ioaddr = devm_ioremap(dev, base, SZ_1K); in sdhci_tangier_probe()
43 if (!plat->ioaddr) in sdhci_tangier_probe()
47 host->ioaddr = plat->ioaddr; in sdhci_tangier_probe()
Dmsm_sdhci.c139 caps = readl(host->ioaddr + SDHCI_CAPABILITIES); in msm_sdc_probe()
141 writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); in msm_sdc_probe()
173 host->ioaddr = (void *)devfdt_get_addr(dev); in msm_ofdata_to_platdata()
179 host->ioaddr == (void *)FDT_ADDR_T_NONE) in msm_ofdata_to_platdata()
Dmv_sdhci.c49 u32 ata = (unsigned long)host->ioaddr + SD_CE_ATA_2; in mv_sdhci_writeb()
58 writeb(val, host->ioaddr + reg); in mv_sdhci_writeb()
77 host->ioaddr = (void *)regbase; in mv_sdh_init()
Dbcm2835_sdhci.c88 writel(val, host->ioaddr + reg); in bcm2835_sdhci_raw_writel()
94 return readl(host->ioaddr + reg); in bcm2835_sdhci_raw_readl()
210 host->ioaddr = (void *)base; in bcm2835_sdhci_probe()
Drockchip_sdhci.c46 host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); in arasan_sdhci_probe()
89 host->ioaddr = dev_read_addr_ptr(dev); in arasan_sdhci_ofdata_to_platdata()
Datmel_sdhci.c30 host->ioaddr = regbase; in atmel_sdhci_init()
72 host->ioaddr = (void *)devfdt_get_addr(dev); in atmel_sdhci_probe()
Dzynq_sdhci.c300 priv->host->ioaddr = (void *)dev_read_addr(dev); in arasan_sdhci_ofdata_to_platdata()
301 if (IS_ERR(priv->host->ioaddr)) in arasan_sdhci_ofdata_to_platdata()
302 return PTR_ERR(priv->host->ioaddr); in arasan_sdhci_ofdata_to_platdata()
Drockchip_dw_mmc.c58 host->ioaddr = dev_read_addr_ptr(dev); in rockchip_dwmmc_ofdata_to_platdata()
108 host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); in rockchip_dwmmc_probe()
Dftsdc010_mci.h22 void *ioaddr; member
Dhi6220_dw_mmc.c50 host->ioaddr = (void *)(ulong)regbase; in hi6220_dwmci_add_port()
Ds5p_sdhci.c114 host->ioaddr = (void *)regbase; in s5p_sdhci_init()
184 host->ioaddr = (void *)base; in sdhci_get_config()
Dftsdc010_mci.c396 chip->ioaddr = (void *)devfdt_get_addr(dev); in ftsdc010_mmc_ofdata_to_platdata()
419 chip->regs = chip->ioaddr; in ftsdc010_mmc_ofdata_to_platdata()
435 chip->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); in ftsdc010_mmc_probe()
Dpci_mmc.c33 host->ioaddr = (void *)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, in pci_mmc_probe()
/external/u-boot/include/
Dsdhci.h257 void *ioaddr; member
284 writel(val, host->ioaddr + reg); in sdhci_writel()
292 writew(val, host->ioaddr + reg); in sdhci_writew()
300 writeb(val, host->ioaddr + reg); in sdhci_writeb()
308 return readl(host->ioaddr + reg); in sdhci_readl()
316 return readw(host->ioaddr + reg); in sdhci_readw()
324 return readb(host->ioaddr + reg); in sdhci_readb()
331 writel(val, host->ioaddr + reg); in sdhci_writel()
336 writew(val, host->ioaddr + reg); in sdhci_writew()
341 writeb(val, host->ioaddr + reg); in sdhci_writeb()
[all …]
Ddwmmc.h151 void *ioaddr; member
199 writel(val, host->ioaddr + reg); in dwmci_writel()
204 writew(val, host->ioaddr + reg); in dwmci_writew()
209 writeb(val, host->ioaddr + reg); in dwmci_writeb()
213 return readl(host->ioaddr + reg); in dwmci_readl()
218 return readw(host->ioaddr + reg); in dwmci_readw()
223 return readb(host->ioaddr + reg); in dwmci_readb()
/external/u-boot/drivers/video/
Ddw_hdmi.c59 writeb(val, hdmi->ioaddr + offset); in hdmi_write()
62 writel(val, hdmi->ioaddr + (offset << 2)); in hdmi_write()
74 return readb(hdmi->ioaddr + offset); in hdmi_read()
76 return readl(hdmi->ioaddr + (offset << 2)); in hdmi_read()
/external/u-boot/board/synopsys/axs10x/
Daxs10x.c26 host->ioaddr = (void *)ARC_DWMMC_BASE; in board_mmc_init()

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