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Searched refs:isMUBUF (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.h200 return isMUBUF(MI) || isMTBUF(MI) || isMIMG(MI); in isVMEM()
204 return isMUBUF(Opcode) || isMTBUF(Opcode) || isMIMG(Opcode); in isVMEM()
279 static bool isMUBUF(const MachineInstr &MI) { in isMUBUF() function
283 bool isMUBUF(uint16_t Opcode) const { in isMUBUF() function
DSIRegisterInfo.cpp255 if (!SIInstrInfo::isMUBUF(*MI)) in getFrameIndexInstrOffset()
327 assert(TII->isMUBUF(MI)); in resolveFrameIndex()
364 return SIInstrInfo::isMUBUF(*MI) && isUInt<12>(Offset); in isFrameOffsetLegal()
DSIInstrInfo.cpp157 if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1))) { in areLoadsFromSameBasePtr()
260 if (isMUBUF(LdSt) || isMTBUF(LdSt)) { in getMemOpBaseRegImmOfs()
315 if ((isMUBUF(FirstLdSt) && isMUBUF(SecondLdSt)) || in shouldClusterMemOps()
1391 if (isMUBUF(MIa) || isMTBUF(MIa)) { in areMemAccessesTriviallyDisjoint()
1392 if (isMUBUF(MIb) || isMTBUF(MIb)) in areMemAccessesTriviallyDisjoint()
1402 return !isFLAT(MIb) && !isMUBUF(MIa) && !isMTBUF(MIa); in areMemAccessesTriviallyDisjoint()
3091 return isMUBUF(Opc) || isMTBUF(Opc) || isMIMG(Opc); in isHighLatencyInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.h317 return isMUBUF(MI) || isMTBUF(MI) || isMIMG(MI); in isVMEM()
321 return isMUBUF(Opcode) || isMTBUF(Opcode) || isMIMG(Opcode); in isVMEM()
404 static bool isMUBUF(const MachineInstr &MI) { in isMUBUF() function
408 bool isMUBUF(uint16_t Opcode) const { in isMUBUF() function
DSIRegisterInfo.cpp272 assert(SIInstrInfo::isMUBUF(*MI)); in getMUBUFInstrOffset()
281 if (!SIInstrInfo::isMUBUF(*MI)) in getFrameIndexInstrOffset()
358 assert(TII->isMUBUF(MI)); in resolveFrameIndex()
375 if (!SIInstrInfo::isMUBUF(*MI)) in isFrameOffsetLegal()
1065 bool IsMUBUF = TII->isMUBUF(*MI); in eliminateFrameIndex()
DSIInstrInfo.cpp219 if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1))) { in areLoadsFromSameBasePtr()
322 if (isMUBUF(LdSt) || isMTBUF(LdSt)) { in getMemOpBaseRegImmOfs()
415 if ((isMUBUF(FirstLdSt) && isMUBUF(SecondLdSt)) || in shouldClusterMemOps()
2179 if (isMUBUF(MIa) || isMTBUF(MIa)) { in areMemAccessesTriviallyDisjoint()
2180 if (isMUBUF(MIb) || isMTBUF(MIb)) in areMemAccessesTriviallyDisjoint()
2190 return !isFLAT(MIb) && !isMUBUF(MIa) && !isMTBUF(MIa); in areMemAccessesTriviallyDisjoint()
3605 (isMUBUF(MI) || isMTBUF(MI)))) { in legalizeOperands()
4709 return isMUBUF(Opc) || isMTBUF(Opc) || isMIMG(Opc); in isHighLatencyInstruction()
4738 if (isMUBUF(MI) || isVGPRSpill(MI)) in isLoadFromStackSlot()
4752 if (isMUBUF(MI) || isVGPRSpill(MI)) in isStoreToStackSlot()
DGCNHazardRecognizer.cpp499 if (TII->isMUBUF(MI) || TII->isMTBUF(MI)) { in createsVALUHazard()
DSIInsertWaitcnts.cpp615 } else if (TII->isMUBUF(Inst)) { in updateByEvent()