| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 69 isTrue = HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI); in init()
185 … NewDefs[*SRI].push_back(NewSense::Def(PredReg, HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI), in init()
197 … NewDefs[*SRI].push_back(NewSense::Def(PredReg, HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI), in init()
221 NewUses[N] = NewSense::Use(PredReg, HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI)); in init()
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| D | HexagonMCCodeEmitter.cpp | 172 if (HexagonMCInstrInfo::isPredicatedTrue(MCII, Inst) == in EncodeSingleInstruction()
173 HexagonMCInstrInfo::isPredicatedTrue(MCII, HMB)) in EncodeSingleInstruction()
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| D | HexagonMCInstrInfo.h | 250 bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI);
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| D | HexagonMCInstrInfo.cpp | 569 bool HexagonMCInstrInfo::isPredicatedTrue(MCInstrInfo const &MCII, in isPredicatedTrue() function in llvm::HexagonMCInstrInfo
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.h | 332 bool isPredicatedTrue(const MachineInstr &MI) const;
333 bool isPredicatedTrue(unsigned Opcode) const;
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| D | HexagonExpandCondsets.cpp | 756 if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(*MI))) in getReachingDefForPred()
926 if (!MI->readsRegister(PredR) || (Cond != HII->isPredicatedTrue(*MI))) in renameInRange()
999 Exec = (Cond == HII->isPredicatedTrue(*MI)) ? Exec_Then : Exec_Else; in predicate()
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| D | HexagonGenMux.cpp | 216 bool IfTrue = HII->isPredicatedTrue(Opc); in genMuxInBlock()
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| D | HexagonInstrInfo.cpp | 2396 bool HexagonInstrInfo::isPredicatedTrue(const MachineInstr &MI) const { in isPredicatedTrue() function in HexagonInstrInfo
2403 bool HexagonInstrInfo::isPredicatedTrue(unsigned Opcode) const { in isPredicatedTrue() function in HexagonInstrInfo
3129 return !isPredicatedTrue(Cond[0].getImm()); in predOpcodeHasNot()
4033 InvPredOpcode = isPredicatedTrue(Opc) ? Hexagon::getFalsePredOpcode(Opc) in getInvertedPredicatedOpcode()
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| D | HexagonVLIWPacketizer.cpp | 449 if (HII->isPredicatedTrue(MI)) in getPredicateSense()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.h | 394 bool isPredicatedTrue(const MachineInstr &MI) const;
395 bool isPredicatedTrue(unsigned Opcode) const;
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| D | HexagonExpandCondsets.cpp | 759 if (MI->readsRegister(PredR) && (Cond != HII->isPredicatedTrue(*MI))) in getReachingDefForPred()
925 if (!MI->readsRegister(PredR) || (Cond != HII->isPredicatedTrue(*MI))) in renameInRange()
997 Exec = (Cond == HII->isPredicatedTrue(*MI)) ? Exec_Then : Exec_Else; in predicate()
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| D | HexagonGenMux.cpp | 253 bool IfTrue = HII->isPredicatedTrue(Opc); in genMuxInBlock()
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| D | HexagonInstrInfo.cpp | 2397 bool HexagonInstrInfo::isPredicatedTrue(const MachineInstr &MI) const { in isPredicatedTrue() function in HexagonInstrInfo
2403 bool HexagonInstrInfo::isPredicatedTrue(unsigned Opcode) const { in isPredicatedTrue() function in HexagonInstrInfo
3090 return !isPredicatedTrue(Cond[0].getImm()); in predOpcodeHasNot()
4095 InvPredOpcode = isPredicatedTrue(Opc) ? Hexagon::getFalsePredOpcode(Opc) in getInvertedPredicatedOpcode()
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| D | HexagonVLIWPacketizer.cpp | 561 if (HII->isPredicatedTrue(MI)) in getPredicateSense()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCInstrInfo.h | 272 bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI);
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| D | HexagonMCInstrInfo.cpp | 653 bool HexagonMCInstrInfo::isPredicatedTrue(MCInstrInfo const &MCII, in isPredicatedTrue() function in HexagonMCInstrInfo
825 return {MCI.getOperand(I).getReg(), I, isPredicatedTrue(MCII, MCI)}; in predicateInfo()
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| D | HexagonMCCodeEmitter.cpp | 771 if (HexagonMCInstrInfo::isPredicatedTrue(MCII, Inst) == in getMachineOpValue()
772 HexagonMCInstrInfo::isPredicatedTrue(MCII, MI)) in getMachineOpValue()
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| D | HexagonMCChecker.cpp | 73 isTrue = HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI); in initReg()
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