| /external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/ |
| D | MCInstrDesc.cpp | 58 if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs))) in hasImplicitDefOfPhysReg()
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| /external/llvm/lib/MC/ |
| D | MCInstrDesc.cpp | 58 if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs))) in hasImplicitDefOfPhysReg()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RedundantCopyElimination.cpp | 140 TRI->isSubRegister(SmallestDef, DefReg) ? DefReg : SmallestDef; in optimizeCopy()
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| D | AArch64LoadStoreOptimizer.cpp | 1494 if (DestReg == BaseReg || TRI->isSubRegister(BaseReg, DestReg)) in findMatchingUpdateInsnForward()
1546 if (DestReg == BaseReg || TRI->isSubRegister(BaseReg, DestReg)) in findMatchingUpdateInsnBackward()
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 404 unsigned BadR = RI.isSubRegister(Hexagon::USR, R) ? UsrR : R; in checkRegisters()
418 unsigned BadR = RI.isSubRegister(Hexagon::USR, R) ? UsrR : R; in checkRegisters()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | MachineInstr.cpp | 906 TRI->isSubRegister(MOReg, Reg))) in findRegisterUseOperandIdx()
960 Found = TRI->isSubRegister(MOReg, Reg); in findRegisterDefOperandIdx()
1593 if (RegInfo->isSubRegister(IncomingReg, Reg)) in addRegisterKilled()
1645 RegInfo->isSubRegister(IncomingReg, Reg)) in addRegisterDead()
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| D | RegAllocLinearScan.cpp | 782 if (tri_->isSubRegister(*as, reg) && in updateSpillWeights()
1197 if (I->reg == minReg || tri_->isSubRegister(minReg, I->reg)) in assignRegOrStackSlotAtInterval()
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| D | LiveVariables.cpp | 215 if (TRI->isSubRegister(Reg, DefReg)) { in FindLastPartialDef()
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| D | AggressiveAntiDepBreaker.cpp | 594 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters()
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| D | ShrinkWrapping.cpp | 426 TRI->isSubRegister(Reg, MOReg))) { in calculateSets()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 584 unsigned BadR = RI.isSubRegister(Hexagon::USR, R) ? UsrR : R; in checkRegisters()
597 unsigned BadR = RI.isSubRegister(Hexagon::USR, R) ? UsrR : R; in checkRegisters()
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| /external/llvm/lib/CodeGen/ |
| D | MachineCopyPropagation.cpp | 137 if (!TRI->isSubRegister(PreviousSrc, Src)) in isNopCopy()
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| D | MachineInstr.cpp | 1300 TRI->isSubRegister(MOReg, Reg))) in findRegisterUseOperandIdx()
1358 Found = TRI->isSubRegister(MOReg, Reg); in findRegisterDefOperandIdx()
1979 if (RegInfo->isSubRegister(IncomingReg, Reg)) in addRegisterKilled()
2043 if (RegInfo->isSubRegister(Reg, MOReg)) in addRegisterDead()
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| D | AggressiveAntiDepBreaker.cpp | 583 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters()
919 if (R == AntiDepReg || TRI->isSubRegister(AntiDepReg, R)) in BreakAntiDependencies()
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| D | LiveVariables.cpp | 219 if (TRI->isSubRegister(Reg, DefReg)) { in FindLastPartialDef()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 343 bool isSubRegister(unsigned regA, unsigned regB) const { in isSubRegister() function
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 209 assert(!TRI->isSubRegister(ScratchRsrcReg, ScratchWaveOffsetReg)); in emitPrologue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 773 TRI->isSubRegister(MOReg, Reg))) in findRegisterUseOperandIdx()
831 Found = TRI->isSubRegister(MOReg, Reg); in findRegisterDefOperandIdx()
1600 if (RegInfo->isSubRegister(IncomingReg, Reg)) in addRegisterKilled()
1664 if (RegInfo->isSubRegister(Reg, MOReg)) in addRegisterDead()
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| D | AggressiveAntiDepBreaker.cpp | 602 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters()
937 if (R == AntiDepReg || TRI->isSubRegister(AntiDepReg, R)) in BreakAntiDependencies()
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| D | MachineCopyPropagation.cpp | 205 if (!TRI->isSubRegister(PreviousSrc, Src)) in isNopCopy()
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| D | LiveVariables.cpp | 219 if (TRI->isSubRegister(Reg, DefReg)) { in FindLastPartialDef()
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 434 bool isSubRegister(unsigned RegA, unsigned RegB) const { in isSubRegister() function
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 456 bool isSubRegister(unsigned RegA, unsigned RegB) const { in isSubRegister() function
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 206 assert(!isSubRegister(ScratchRSrcReg, ScratchWaveOffsetReg)); in getReservedRegs()
216 assert(!isSubRegister(ScratchRSrcReg, StackPtrReg)); in getReservedRegs()
222 assert(!isSubRegister(ScratchRSrcReg, FrameReg)); in getReservedRegs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 1453 if (DestReg == BaseReg || TRI->isSubRegister(BaseReg, DestReg)) in findMatchingUpdateInsnForward()
1505 if (DestReg == BaseReg || TRI->isSubRegister(BaseReg, DestReg)) in findMatchingUpdateInsnBackward()
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