Searched refs:isTypeLegalForClass (Results 1 – 12 of 12) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 278 else if (TRI->isTypeLegalForClass(*RC, MVT::v16i8)) in storeRegToStack()
280 else if (TRI->isTypeLegalForClass(*RC, MVT::v8i16) || in storeRegToStack()
281 TRI->isTypeLegalForClass(*RC, MVT::v8f16)) in storeRegToStack()
283 else if (TRI->isTypeLegalForClass(*RC, MVT::v4i32) || in storeRegToStack()
284 TRI->isTypeLegalForClass(*RC, MVT::v4f32)) in storeRegToStack()
286 else if (TRI->isTypeLegalForClass(*RC, MVT::v2i64) || in storeRegToStack()
287 TRI->isTypeLegalForClass(*RC, MVT::v2f64)) in storeRegToStack()
356 else if (TRI->isTypeLegalForClass(*RC, MVT::v16i8)) in loadRegFromStack()
358 else if (TRI->isTypeLegalForClass(*RC, MVT::v8i16) || in loadRegFromStack()
359 TRI->isTypeLegalForClass(*RC, MVT::v8f16)) in loadRegFromStack()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRInstrInfo.cpp | 145 if (TRI->isTypeLegalForClass(*RC, MVT::i8)) { in storeRegToStackSlot()
147 } else if (TRI->isTypeLegalForClass(*RC, MVT::i16)) { in storeRegToStackSlot()
179 if (TRI->isTypeLegalForClass(*RC, MVT::i8)) { in loadRegFromStackSlot()
181 } else if (TRI->isTypeLegalForClass(*RC, MVT::i16)) { in loadRegFromStackSlot()
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| D | AVRRegisterInfo.cpp | 86 if (TRI->isTypeLegalForClass(*RC, MVT::i16)) { in getLargestLegalSuperClass()
90 if (TRI->isTypeLegalForClass(*RC, MVT::i8)) { in getLargestLegalSuperClass()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 198 if ((VT == MVT::Other || isTypeLegalForClass(*RC, VT)) && in getMinimalPhysRegClass()
249 if (SVT == MVT::SimpleValueType::Any || TRI->isTypeLegalForClass(*RC, VT)) in firstCommonClass()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyAsmPrinter.cpp | 54 if (TRI->isTypeLegalForClass(*TRC, T)) in getRegType()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 331 bool isTypeLegalForClass(const TargetRegisterClass &RC, MVT T) const { in isTypeLegalForClass() function
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 164 assert(TRI->isTypeLegalForClass(*UseRC, VT) && in EmitCopyFromReg()
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| D | TargetLowering.cpp | 3010 if (RI->isTypeLegalForClass(*RC, VT)) in getRegForInlineAsmConstraint()
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| D | SelectionDAGBuilder.cpp | 7229 !TRI.isTypeLegalForClass(*PhysReg.second, OpInfo.ConstraintVT)) { in GetRegistersForValue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 3274 assert(TRI->isTypeLegalForClass(*RC, MVT::i32) && "Invalid destination!"); in emitEHSjLjSetJmp()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 27874 assert(TRI->isTypeLegalForClass(*RC, MVT::i32) && "Invalid destination!"); in emitEHSjLjSetJmp()
40661 if (TRI->isTypeLegalForClass(*Res.second, VT) || VT == MVT::Other) in getRegForInlineAsmConstraint()
40701 else if (TRI->isTypeLegalForClass(X86::VR128RegClass, VT)) in getRegForInlineAsmConstraint()
40703 else if (TRI->isTypeLegalForClass(X86::VR256RegClass, VT)) in getRegForInlineAsmConstraint()
40705 else if (TRI->isTypeLegalForClass(X86::VR512RegClass, VT)) in getRegForInlineAsmConstraint()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9977 assert(TRI->isTypeLegalForClass(*RC, MVT::i32) && "Invalid destination!"); in emitEHSjLjSetJmp()
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