| /external/v8/src/ppc/ |
| D | assembler-ppc.cc | 486 CHECK(is_int16(imm16) && (imm16 & (kAAMask | kLKMask)) == 0); in target_at_put()
641 if (!is_int16(val)) { in d_form()
644 CHECK(is_int16(val)); in d_form()
745 CHECK(is_int16(imm16) && (imm16 & (kAAMask | kLKMask)) == 0); in bc()
960 DCHECK(is_int16(imm16)); in cmpi()
985 DCHECK(is_int16(imm16)); in cmpwi()
1067 CHECK(!(offset & 3) && is_int16(offset)); in lwa()
1109 CHECK(!(offset & 3) && is_int16(offset)); in ld()
1118 CHECK(!(offset & 3) && is_int16(offset)); in ldu()
1127 CHECK(!(offset & 3) && is_int16(offset)); in std()
[all …]
|
| D | macro-assembler-ppc.cc | 2321 if (is_int16(value)) { in Add()
2333 if (is_int16(value)) { in Cmpi()
2355 if (is_int16(value)) { in Cmpwi()
2490 if (!is_int16(offset)) { in LoadP()
2517 if (!is_int16(offset)) { in LoadPU()
2536 if (!is_int16(offset)) { in StoreP()
2568 if (!is_int16(offset)) { in StorePU()
2586 if (!is_int16(offset)) { in LoadWordArith()
2616 if (!is_int16(offset)) { in LoadWord()
2632 if (!is_int16(offset)) { in StoreWord()
[all …]
|
| D | assembler-ppc-inl.h | 372 DCHECK(!is_int16(offset)); in GetConstantPoolOffset()
385 CHECK(overflowed != is_int16(offset)); in PatchConstantPoolAccessInstruction()
|
| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 374 if (is_int16(rt.immediate()) && !MustUseReg(rt.rmode())) { in Addu()
391 if (is_int16(rt.immediate()) && !MustUseReg(rt.rmode())) { in Daddu()
409 if (is_int16(-rt.immediate()) && !MustUseReg(rt.rmode())) { in Subu()
433 } else if (is_int16(-rt.immediate()) && !MustUseReg(rt.rmode())) { in Dsubu()
938 if (is_int16(rt.immediate()) && !MustUseReg(rt.rmode())) { in Slt()
1502 : is_int16(rs.offset()); in Ll()
1516 : is_int16(rs.offset()); in Lld()
1530 : is_int16(rs.offset()); in Sc()
1544 : is_int16(rs.offset()); in Scd()
1577 if (!is_int16(static_cast<int32_t>(value)) && (value & kUpper16MaskOf64) && in InstrCountForLiLower32Bit()
[all …]
|
| D | assembler-mips64.cc | 904 if (is_int16(imm + Assembler::kLongBranchPCOffset - in target_at_put()
953 if (is_int16(imm_short)) { in target_at_put()
1231 DCHECK(rs.is_valid() && rt.is_valid() && (is_int16(j) || is_uint16(j))); in GenInstrImmediate()
1251 DCHECK(rs.is_valid() && (is_int16(j) || is_uint16(j))); in GenInstrImmediate()
1260 DCHECK(rs.is_valid() && ft.is_valid() && (is_int16(j) || is_uint16(j))); in GenInstrImmediate()
1414 DCHECK(wt.is_valid() && is_int16(offset16)); in GenInstrMsaBranch()
1538 DCHECK(is_int16(imm16)); in label_at_put()
2272 if (is_int16(src.offset()) && in AdjustBaseAndOffset()
2273 (!two_accesses || is_int16(static_cast<int32_t>( in AdjustBaseAndOffset()
2334 if (two_accesses && !is_int16(static_cast<int32_t>( in AdjustBaseAndOffset()
[all …]
|
| D | deoptimizer-mips64.cc | 263 DCHECK(is_int16(i)); in GeneratePrologue()
287 DCHECK(is_int16(i)); in GeneratePrologue()
|
| D | assembler-mips64.h | 477 return is_int16(offset_); in OffsetIsInt16Encodable()
|
| /external/v8/src/mips/ |
| D | deoptimizer-mips.cc | 266 DCHECK(is_int16(i)); in GeneratePrologue()
289 DCHECK(is_int16(i)); in GeneratePrologue()
|
| D | assembler-mips.cc | 961 if (is_int16(imm_short)) { in target_at_put()
997 if (is_int16(imm + Assembler::kLongBranchPCOffset - in target_at_put()
1267 DCHECK(rs.is_valid() && rt.is_valid() && (is_int16(j) || is_uint16(j))); in GenInstrImmediate()
1287 DCHECK(rs.is_valid() && (is_int16(j) || is_uint16(j))); in GenInstrImmediate()
1296 DCHECK(rs.is_valid() && ft.is_valid() && (is_int16(j) || is_uint16(j))); in GenInstrImmediate()
1450 DCHECK(wt.is_valid() && is_int16(offset16)); in GenInstrMsaBranch()
1558 DCHECK(is_int16(imm16)); in label_at_put()
2118 if (is_int16(src.offset()) && in AdjustBaseAndOffset()
2119 (!two_accesses || is_int16(static_cast<int32_t>( in AdjustBaseAndOffset()
2167 if (two_accesses && !is_int16(static_cast<int32_t>( in AdjustBaseAndOffset()
[all …]
|
| D | macro-assembler-mips.cc | 374 if (is_int16(rt.immediate()) && !MustUseReg(rt.rmode())) { in Addu()
391 if (is_int16(-rt.immediate()) && !MustUseReg(rt.rmode())) { in Subu()
800 if (is_int16(rt.immediate()) && !MustUseReg(rt.rmode())) { in Slt()
1303 : is_int16(rs.offset()); in Ll()
1318 : is_int16(rs.offset()); in Sc()
1355 if (is_int16(j.immediate())) { in li()
2758 DCHECK(IsMipsArchVariant(kMips32r6) ? is_int26(offset) : is_int16(offset)); in Branch()
2846 DCHECK(is_int16(offset)); in BranchShort()
3254 DCHECK(is_int16(offset)); in BranchShortCheck()
3351 DCHECK(is_int16(offset)); in BranchAndLinkShort()
[all …]
|
| D | assembler-mips.h | 470 return is_int16(offset_); in OffsetIsInt16Encodable()
|
| /external/v8/src/s390/ |
| D | assembler-s390.h | 872 DCHECK(is_uint16(i2.immediate()) || is_int16(i2.immediate())); \
894 is_int16(i2.immediate()) : is_uint16(i2.immediate())); \
982 DCHECK(is_uint16(f3) || is_int16(f3)); in rsi_format()
1323 CHECK(is_int16(offset_halfwords)); in brxh()
1329 CHECK(is_int16(offset_halfwords)); in brxhg()
|
| D | assembler-s390.cc | 472 DCHECK(is_int16(imm16)); in target_at_put()
613 if (is_bound && is_int16(offset_in_halfwords)) { in branchOnCond()
|
| D | macro-assembler-s390.cc | 2451 if (is_int16(opnd.immediate())) in Add32()
2466 if (is_int16(opnd.immediate())) in AddP()
2478 if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) { in Add32()
2497 if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) { in AddP()
3244 if (is_int16(value)) { in Load()
3318 if (is_int16(value)) in Cmp32()
3438 if (is_int16(value)) in Branch()
3447 if (is_int16(offset)) { in BranchOnCount()
3634 mem.getIndexRegister() == r0 && is_int16(opnd.immediate())) { in StoreP()
|
| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 1132 (kArchVariant == kMips64r6) ? is_int9(offset) : is_int16(offset); in LlLatency()
1160 (kArchVariant == kMips64r6) ? is_int9(offset) : is_int16(offset); in ScLatency()
|
| D | instruction-selector-mips64.cc | 111 return is_int16(value); in CanBeImmediate()
|
| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 886 IsMipsArchVariant(kMips32r6) ? is_int9(offset) : is_int16(offset); in LlLatency()
922 IsMipsArchVariant(kMips32r6) ? is_int9(offset) : is_int16(offset); in ScLatency()
|
| D | instruction-selector-mips.cc | 99 return is_int16(value); in CanBeImmediate()
|
| D | code-generator-mips.cc | 3039 if (is_int16(-right.immediate())) { in AssembleArchBoolean()
|
| /external/v8/src/compiler/ppc/ |
| D | instruction-selector-ppc.cc | 53 return is_int16(value); in CanBeImmediate()
57 return is_int16(-value); in CanBeImmediate()
59 return is_int16(value) && !(value & 3); in CanBeImmediate()
|
| D | code-generator-ppc.cc | 1422 if (is_int16(i.InputImmediate(1).immediate())) { in AssembleArchInstruction()
|
| /external/v8/src/ia32/ |
| D | assembler-ia32.cc | 899 DCHECK(imm16.is_int16() || imm16.is_uint16()); in cmpw()
1358 DCHECK(imm16.is_int16() || imm16.is_uint16()); in test_w()
1379 DCHECK(imm16.is_int16() || imm16.is_uint16()); in test_w()
|
| D | assembler-ia32.h | 265 bool is_int16() const { in is_int16() function
266 return RelocInfo::IsNone(rmode_) && i::is_int16(immediate()); in is_int16()
|
| /external/v8/src/regexp/mips64/ |
| D | regexp-macro-assembler-mips64.cc | 1028 if (is_int16(cp_offset)) { in PushBacktrack()
|
| /external/v8/src/regexp/mips/ |
| D | regexp-macro-assembler-mips.cc | 990 if (is_int16(cp_offset)) { in PushBacktrack()
|