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Searched refs:iv_size (Results 1 – 8 of 8) sorted by relevance

/external/wpa_supplicant_8/src/tls/
Dtlsv1_record.c60 rl->iv_size = data->block_size; in tlsv1_record_set_cipher_suite()
176 rl->iv_size && rl->tls_version >= TLS_VERSION_1_1; in tlsv1_record_send()
179 if (pos + rl->iv_size > buf + buf_size) in tlsv1_record_send()
187 if (os_get_random(pos, rl->iv_size)) in tlsv1_record_send()
189 pos += rl->iv_size; in tlsv1_record_send()
234 if (rl->iv_size) { in tlsv1_record_send()
237 pad = (len + 1) % rl->iv_size; in tlsv1_record_send()
239 pad = rl->iv_size - pad; in tlsv1_record_send()
366 if (rl->iv_size) { in tlsv1_record_receive()
380 if (plen < rl->iv_size) { in tlsv1_record_receive()
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Dtlsv1_server.c86 conn->rl.iv_size); in tlsv1_server_derive_keys()
114 os_memcpy(conn->rl.read_iv, pos, conn->rl.iv_size); in tlsv1_server_derive_keys()
115 pos += conn->rl.iv_size; in tlsv1_server_derive_keys()
117 os_memcpy(conn->rl.write_iv, pos, conn->rl.iv_size); in tlsv1_server_derive_keys()
118 pos += conn->rl.iv_size; in tlsv1_server_derive_keys()
675 conn->rl.iv_size); in tlsv1_server_get_keyblock_size()
Dtlsv1_client.c81 key_block_len += 2 * conn->rl.iv_size; in tls_derive_keys()
110 os_memcpy(conn->rl.write_iv, pos, conn->rl.iv_size); in tls_derive_keys()
111 pos += conn->rl.iv_size; in tls_derive_keys()
113 os_memcpy(conn->rl.read_iv, pos, conn->rl.iv_size); in tls_derive_keys()
120 os_memset(conn->rl.write_iv, 0, conn->rl.iv_size); in tls_derive_keys()
775 conn->rl.iv_size); in tlsv1_client_get_keyblock_size()
Dtlsv1_record.h43 size_t iv_size; /* also block_size */ member
/external/scapy/scapy/layers/
Dipsec.py189 def __init__(self, name, cipher, mode, block_size=None, iv_size=None, argument
228 if iv_size is None:
229 self.iv_size = self.block_size
231 self.iv_size = iv_size
266 return os.urandom(self.iv_size)
372 iv = esp.data[:self.iv_size]
373 data = esp.data[self.iv_size:len(esp.data) - icv_size]
414 'NULL': CryptAlgo('NULL', cipher=None, mode=None, iv_size=0),
425 iv_size=8,
433 iv_size=8,
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/external/u-boot/arch/arm/mach-exynos/
Dclock_init.h110 unsigned iv_size; member
Dclock_init_exynos5.c213 .iv_size = 0x7,
316 .iv_size = 0x7,
419 .iv_size = 0x7,
Ddmc_init_ddr3.c108 writel(mem->iv_size, &dmc->ivcontrol); in ddr3_mem_ctrl_init()