Home
last modified time | relevance | path

Searched refs:kArchVariant (Results 1 – 16 of 16) sorted by relevance

/external/v8/src/compiler/mips64/
Dinstruction-scheduler-mips64.cc498 if (kArchVariant >= kMips64r6) { in DmulLatency()
511 if (kArchVariant >= kMips64r6) { in MulhLatency()
524 if (kArchVariant >= kMips64r6) { in MulhuLatency()
537 if (kArchVariant >= kMips64r6) { in DMulhLatency()
566 if (kArchVariant >= kMips64r6) { in DdivLatency()
579 if (kArchVariant >= kMips64r6) { in DdivuLatency()
592 if (kArchVariant >= kMips64r6) { in ModLatency()
605 if (kArchVariant >= kMips64r6) { in ModuLatency()
618 if (kArchVariant >= kMips64r6) { in DmodLatency()
631 if (kArchVariant >= kMips64r6) { in DmoduLatency()
[all …]
Dcode-generator-mips64.cc996 if (kArchVariant == kMips64r6) { in AssembleArchInstruction()
1004 if (kArchVariant == kMips64r6) { in AssembleArchInstruction()
1021 if (kArchVariant == kMips64r6) { in AssembleArchInstruction()
1029 if (kArchVariant == kMips64r6) { in AssembleArchInstruction()
3374 if (kArchVariant != kMips64r6) { in AssembleArchBoolean()
Dinstruction-selector-mips64.cc2906 if (kArchVariant == kMips64r6) { in AlignmentRequirements()
2910 DCHECK_EQ(kMips64r2, kArchVariant); in AlignmentRequirements()
/external/v8/src/mips64/
Dassembler-mips64.cc518 if (!isBranch && kArchVariant == kMips64r6) { in IsBranch()
736 if (kArchVariant == kMips64r6) { in OffsetSizeInBits()
1110 return kArchVariant == kMips64r6 ? is_near_r6(L) : is_near_pre_r6(L); in is_near_branch()
1118 if (kArchVariant == kMips64r6) { in BranchOffset()
1303 DCHECK((kArchVariant == kMips64r6) && IsEnabled(MIPS_SIMD)); in GenInstrMsaI8()
1312 DCHECK((kArchVariant == kMips64r6) && IsEnabled(MIPS_SIMD)); in GenInstrMsaI5()
1326 DCHECK((kArchVariant == kMips64r6) && IsEnabled(MIPS_SIMD)); in GenInstrMsaBit()
1335 DCHECK((kArchVariant == kMips64r6) && IsEnabled(MIPS_SIMD)); in GenInstrMsaI10()
1345 DCHECK((kArchVariant == kMips64r6) && IsEnabled(MIPS_SIMD)); in GenInstrMsa3R()
1355 DCHECK((kArchVariant == kMips64r6) && IsEnabled(MIPS_SIMD)); in GenInstrMsaElm()
[all …]
Dmacro-assembler-mips64.cc473 if (kArchVariant != kMips64r6) { in Mulh()
485 if (kArchVariant != kMips64r6) { in Mulh()
496 if (kArchVariant != kMips64r6) { in Mulhu()
508 if (kArchVariant != kMips64r6) { in Mulhu()
519 if (kArchVariant == kMips64r6) { in Dmul()
531 if (kArchVariant == kMips64r6) { in Dmul()
542 if (kArchVariant == kMips64r6) { in Dmulh()
554 if (kArchVariant == kMips64r6) { in Dmulh()
630 if (kArchVariant != kMips64r6) { in Div()
642 if (kArchVariant != kMips64r6) { in Div()
[all …]
Dsimulator-mips64.cc833 if (kArchVariant == kMips64r6) { in Simulator()
1874 if ((addr & 0x3) == 0 || kArchVariant == kMips64r6) { in ReadW()
1894 if ((addr & 0x3) == 0 || kArchVariant == kMips64r6) { in ReadWU()
1914 if ((addr & 0x3) == 0 || kArchVariant == kMips64r6) { in WriteW()
1934 if ((addr & kPointerAlignmentMask) == 0 || kArchVariant == kMips64r6) { in Read2W()
1954 if ((addr & kPointerAlignmentMask) == 0 || kArchVariant == kMips64r6) { in Write2W()
1967 if ((addr & kDoubleAlignmentMask) == 0 || kArchVariant == kMips64r6) { in ReadD()
1979 if ((addr & kDoubleAlignmentMask) == 0 || kArchVariant == kMips64r6) { in WriteD()
1992 if ((addr & 1) == 0 || kArchVariant == kMips64r6) { in ReadHU()
2006 if ((addr & 1) == 0 || kArchVariant == kMips64r6) { in ReadH()
[all …]
Ddisasm-mips64.cc1444 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL()
1544 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL()
1555 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL()
1566 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL()
1578 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL()
1589 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL()
1600 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL()
1611 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL()
1721 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL2()
1726 if (kArchVariant != kMips64r6) { in DecodeTypeRegisterSPECIAL2()
[all …]
Ddeoptimizer-mips64.cc264 if (kArchVariant == kMips64r6) { in GeneratePrologue()
281 DCHECK_NE(kArchVariant, kMips64r6); in GeneratePrologue()
Dconstants-mips64.h30 static const ArchVariants kArchVariant = kMips64r2; variable
32 static const ArchVariants kArchVariant = kMips64r6; variable
34 static const ArchVariants kArchVariant = kMips64r2; variable
1804 DCHECK_EQ(kArchVariant, kMips64r6); in InstructionType()
Dassembler-mips64.h534 DCHECK(!(kArchVariant == kMips64r6)); in is_near_pre_r6()
538 DCHECK_EQ(kArchVariant, kMips64r6); in is_near_r6()
668 kArchVariant == kMips64r6 ? 2 * kInstrSize : 7 * kInstrSize;
1915 static bool IsCompactBranchSupported() { return kArchVariant == kMips64r6; } in IsCompactBranchSupported()
Dmacro-assembler-mips64.h1252 if (kArchVariant >= kMips64r6) { in GenerateSwitchTable()
/external/v8/src/mips/
Dconstants-mips.h27 static const ArchVariants kArchVariant = kMips32r2; variable
29 static const ArchVariants kArchVariant = kMips32r6; variable
33 static const ArchVariants kArchVariant = kLoongson; variable
38 static const ArchVariants kArchVariant = kMips32r1; variable
40 static const ArchVariants kArchVariant = kMips32r1; variable
105 (kArchVariant == check)
Dmacro-assembler-mips.h1181 if (kArchVariant >= kMips32r6) { in GenerateSwitchTable()
/external/v8/src/compiler/mips/
Dinstruction-scheduler-mips.cc1260 if (kArchVariant >= kMips32r6) { in GenerateSwitchTableLatency()
/external/v8/src/builtins/mips/
Dbuiltins-mips.cc2366 if (kArchVariant >= kMips32r6) { in Generate_CEntry()
/external/v8/src/builtins/mips64/
Dbuiltins-mips64.cc2384 if (kArchVariant >= kMips64r6) { in Generate_CEntry()