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Searched refs:kOutputs_Sdiv_RdIsNotRnIsNotRm_al_r11_r6_r12 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-sdiv-a32.h7622 const Inputs kOutputs_Sdiv_RdIsNotRnIsNotRm_al_r11_r6_r12[] = { variable
9088 ARRAY_SIZE(kOutputs_Sdiv_RdIsNotRnIsNotRm_al_r11_r6_r12),
9089 kOutputs_Sdiv_RdIsNotRnIsNotRm_al_r11_r6_r12,
Dsimulator-cond-rd-rn-rm-sdiv-t32.h7622 const Inputs kOutputs_Sdiv_RdIsNotRnIsNotRm_al_r11_r6_r12[] = { variable
9088 ARRAY_SIZE(kOutputs_Sdiv_RdIsNotRnIsNotRm_al_r11_r6_r12),
9089 kOutputs_Sdiv_RdIsNotRnIsNotRm_al_r11_r6_r12,