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Searched refs:kOutputs_Sdiv_RdIsRm_al_r6_r7_r6 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-sdiv-a32.h4592 const Inputs kOutputs_Sdiv_RdIsRm_al_r6_r7_r6[] = { variable
9028 ARRAY_SIZE(kOutputs_Sdiv_RdIsRm_al_r6_r7_r6),
9029 kOutputs_Sdiv_RdIsRm_al_r6_r7_r6,
Dsimulator-cond-rd-rn-rm-sdiv-t32.h4592 const Inputs kOutputs_Sdiv_RdIsRm_al_r6_r7_r6[] = { variable
9028 ARRAY_SIZE(kOutputs_Sdiv_RdIsRm_al_r6_r7_r6),
9029 kOutputs_Sdiv_RdIsRm_al_r6_r7_r6,