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Searched refs:kOutputs_Uqadd16_RnIsRm_al_r12_r7_r7 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-uqadd16-a32.h5198 const Inputs kOutputs_Uqadd16_RnIsRm_al_r12_r7_r7[] = { variable
9040 ARRAY_SIZE(kOutputs_Uqadd16_RnIsRm_al_r12_r7_r7),
9041 kOutputs_Uqadd16_RnIsRm_al_r12_r7_r7,
Dsimulator-cond-rd-rn-rm-uqadd16-t32.h5198 const Inputs kOutputs_Uqadd16_RnIsRm_al_r12_r7_r7[] = { variable
9040 ARRAY_SIZE(kOutputs_Uqadd16_RnIsRm_al_r12_r7_r7),
9041 kOutputs_Uqadd16_RnIsRm_al_r12_r7_r7,